From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BE92C7618B for ; Tue, 23 Jul 2019 10:44:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 456192081B for ; Tue, 23 Jul 2019 10:44:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563878699; bh=UB8ABZyj52/9JHGZYXEQ6/7GHo21t57qv9F1Tk34CaQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=gvOaqKZr9vjJs5BTv6qQvtpJodI0ZsnJq3TWHkWlSn6OKzD+yEHN79kcNXGZu9ZLq AYap7cfs5vmHVdjzBVManTum/50jHyjRHUShWkNI8IbVjickmPtFM767sfo5owaInL HHKaiqwuqSPxark+MQPplqeseBr6Gep66KODiZD4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389181AbfGWKo5 (ORCPT ); Tue, 23 Jul 2019 06:44:57 -0400 Received: from foss.arm.com ([217.140.110.172]:52548 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388961AbfGWKou (ORCPT ); Tue, 23 Jul 2019 06:44:50 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 82EC91570; Tue, 23 Jul 2019 03:44:50 -0700 (PDT) Received: from filthy-habits.cambridge.arm.com (filthy-habits.cambridge.arm.com [10.1.197.61]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9B08E3F71A; Tue, 23 Jul 2019 03:44:49 -0700 (PDT) From: Marc Zyngier To: Thomas Gleixner , Jason Cooper , Julien Thierry , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/9] dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range support Date: Tue, 23 Jul 2019 11:44:31 +0100 Message-Id: <20190723104437.154403-4-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190723104437.154403-1-maz@kernel.org> References: <20190723104437.154403-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GICv3.1 introduces support for new interrupt ranges, one of them being the Extended SPI range (ESPI). The DT binding is extended to deal with it as a new interrupt class. Signed-off-by: Marc Zyngier --- .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index c34df35a25fc..98a3ecda8e07 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -44,11 +44,12 @@ properties: be at least 4. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI - interrupts. Other values are reserved for future use. + interrupts, 2 for interrupts in the Extended SPI range. Other values + are reserved for future use. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the - range [0-15]. + range [0-15]. Extented SPI interrupts are in the range [0-1023]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. -- 2.20.1