[PATCH v2 0/6] MIPS: ralink: add CPU clock detection for MT7621

Chuanhong Guo
2019-07-24T02:24:13Z

This patchset ports CPU clock detection for MT7621 from OpenWrt.

Last time I sent this, I forgot to add an binding include which
caused a compile error and the patch doesn't stay in linux-next.

This patchset resent the first two commits and also added binding
documentation for mt7621-pll and used it in mt7621-dts at
drivers/staging.

Changes since v1:
1. changed commit title prefix for dt include
2. split the patch adding clock node (details in that patch body)
3. drop useless syscon in dt documentation
4. drop cpuclock node for gbpc1

Chuanhong Guo (6):
dt-bindings: clock: add dt binding header for mt7621-pll
MIPS: ralink: drop ralink_clk_init for mt7621
MIPS: ralink: add clock device providing cpu/bus clock for mt7621
dt: bindings: add mt7621-pll dt binding documentation
staging: mt7621-dts: fix register range of memc node in mt7621.dtsi
staging: mt7621-dts: add dt nodes for mt7621-pll

.../bindings/clock/mediatek,mt7621-pll.txt | 18 ++++
arch/mips/include/asm/mach-ralink/mt7621.h | 20 ++++
arch/mips/ralink/mt7621.c | 98 +++++++++++++------
drivers/staging/mt7621-dts/gbpc1.dts | 5 -
drivers/staging/mt7621-dts/mt7621.dtsi | 17 ++--
include/dt-bindings/clock/mt7621-clk.h | 14 +++
6 files changed, 126 insertions(+), 46 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt
create mode 100644 include/dt-bindings/clock/mt7621-clk.h

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2.21.0