Re: [PATCH v2 3/3] soc/tegra: regulators: Add regulators coupler for Tegra30

Peter De Schrijver
2019-08-05T08:33:30Z

On Fri, Aug 02, 2019 at 05:39:23PM +0300, Dmitry Osipenko wrote:
> 02.08.2019 17:05, Peter De Schrijver пишет:
> > On Thu, Jul 25, 2019 at 06:18:32PM +0300, Dmitry Osipenko wrote:
> >> Add regulators coupler for Tegra30 SoCs that performs voltage balancing
> >> of a coupled regulators and thus provides voltage scaling functionality.
> >>
> >> There are 2 coupled regulators on all Tegra30 SoCs: CORE and CPU. The
> >> coupled regulator voltages shall be in a range of 300mV from each other
> >> and CORE voltage shall be higher than the CPU by N mV, where N depends
> >> on the CPU voltage.
> >>
> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> >> ---
> >> drivers/soc/tegra/Kconfig | 4 +
> >> drivers/soc/tegra/Makefile | 1 +
> >> drivers/soc/tegra/regulators-tegra30.c | 316 +++++++++++++++++++++++++
> >> 3 files changed, 321 insertions(+)
> >> create mode 100644 drivers/soc/tegra/regulators-tegra30.c
> >>
> > ...
> >
> >> +
> >> +static int tegra30_core_cpu_limit(int cpu_uV)
> >> +{
> >> + if (cpu_uV < 800000)
> >> + return 950000;
> >> +
> >> + if (cpu_uV < 900000)
> >> + return 1000000;
> >> +
> >> + if (cpu_uV < 1000000)
> >> + return 1100000;
> >> +
> >> + if (cpu_uV < 1100000)
> >> + return 1200000;
> >> +
> >> + if (cpu_uV < 1250000) {
> >> + switch (tegra_sku_info.cpu_speedo_id) {
> >> + case 0 ... 1:
> > Aren't we supposed to add /* fall through */ here now?
>
> There is no compiler warning if there is nothing in-between of the
> case-switches, so annotation isn't really necessary here. Of course it
> is possible to add an explicit annotation just to make clear the
> fall-through intention.
>

Ah. Ok. Whatever you want then :)

> >> + case 4:
> >> + case 7 ... 8:
> >> + return 1200000;
> >> +
> >> + default:
> >> + return 1300000;
> >> + }
> >> + }
> >> +
> >
> > Other than that, this looks ok to me.
>
> Awesome, thank you very much! Explicit ACK will be appreciated as well.

Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>