Re: [PATCH 1/3][V4] iio: imu: adis: Add support for SPI transfer cs_change_delay

Jonathan Cameron
2019-07-27T18:48:14Z

On Tue, 23 Jul 2019 10:36:38 +0300
Alexandru Ardelean <alexandru.ardelean@analog.com> wrote:

> The ADIS16460 requires a higher delay before the next transfer. Since the
> SPI framework supports configuring the delay before the next transfer, this
> driver will become the first user of it.
>
> The support for this functionality in ADIS16460 requires an addition to the
> ADIS lib to support the `cs_change_delay` functionality from the SPI
> subsystem.
>
> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.

Thanks,

Jonathan

> ---
> drivers/iio/imu/adis.c | 12 ++++++++++++
> include/linux/iio/imu/adis.h | 2 ++
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/iio/imu/adis.c b/drivers/iio/imu/adis.c
> index 30281e91dbf9..1631c255deab 100644
> --- a/drivers/iio/imu/adis.c
> +++ b/drivers/iio/imu/adis.c
> @@ -39,18 +39,24 @@ int adis_write_reg(struct adis *adis, unsigned int reg,
> .len = 2,
> .cs_change = 1,
> .delay_usecs = adis->data->write_delay,
> + .cs_change_delay = adis->data->cs_change_delay,
> + .cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
> }, {
> .tx_buf = adis->tx + 2,
> .bits_per_word = 8,
> .len = 2,
> .cs_change = 1,
> .delay_usecs = adis->data->write_delay,
> + .cs_change_delay = adis->data->cs_change_delay,
> + .cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
> }, {
> .tx_buf = adis->tx + 4,
> .bits_per_word = 8,
> .len = 2,
> .cs_change = 1,
> .delay_usecs = adis->data->write_delay,
> + .cs_change_delay = adis->data->cs_change_delay,
> + .cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
> }, {
> .tx_buf = adis->tx + 6,
> .bits_per_word = 8,
> @@ -133,12 +139,16 @@ int adis_read_reg(struct adis *adis, unsigned int reg,
> .len = 2,
> .cs_change = 1,
> .delay_usecs = adis->data->write_delay,
> + .cs_change_delay = adis->data->cs_change_delay,
> + .cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
> }, {
> .tx_buf = adis->tx + 2,
> .bits_per_word = 8,
> .len = 2,
> .cs_change = 1,
> .delay_usecs = adis->data->read_delay,
> + .cs_change_delay = adis->data->cs_change_delay,
> + .cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
> }, {
> .tx_buf = adis->tx + 4,
> .rx_buf = adis->rx,
> @@ -146,6 +156,8 @@ int adis_read_reg(struct adis *adis, unsigned int reg,
> .len = 2,
> .cs_change = 1,
> .delay_usecs = adis->data->read_delay,
> + .cs_change_delay = adis->data->cs_change_delay,
> + .cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
> }, {
> .rx_buf = adis->rx + 2,
> .bits_per_word = 8,
> diff --git a/include/linux/iio/imu/adis.h b/include/linux/iio/imu/adis.h
> index 3428d06b2f44..4c53815bb729 100644
> --- a/include/linux/iio/imu/adis.h
> +++ b/include/linux/iio/imu/adis.h
> @@ -26,6 +26,7 @@ struct adis_burst;
> * struct adis_data - ADIS chip variant specific data
> * @read_delay: SPI delay for read operations in us
> * @write_delay: SPI delay for write operations in us
> + * @cs_change_delay: SPI delay between CS changes in us
> * @glob_cmd_reg: Register address of the GLOB_CMD register
> * @msc_ctrl_reg: Register address of the MSC_CTRL register
> * @diag_stat_reg: Register address of the DIAG_STAT register
> @@ -35,6 +36,7 @@ struct adis_burst;
> struct adis_data {
> unsigned int read_delay;
> unsigned int write_delay;
> + unsigned int cs_change_delay;
>
> unsigned int glob_cmd_reg;
> unsigned int msc_ctrl_reg;