From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4ECBC0650F for ; Mon, 5 Aug 2019 17:28:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8A25D208E3 for ; Mon, 5 Aug 2019 17:28:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alien8.de header.i=@alien8.de header.b="boGMj2jp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729439AbfHER25 (ORCPT ); Mon, 5 Aug 2019 13:28:57 -0400 Received: from mail.skyhub.de ([5.9.137.197]:49068 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727460AbfHER25 (ORCPT ); Mon, 5 Aug 2019 13:28:57 -0400 Received: from zn.tnic (p200300EC2F065B00D19C900BA9CC48C2.dip0.t-ipconnect.de [IPv6:2003:ec:2f06:5b00:d19c:900b:a9cc:48c2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id E89511EC0C31; Mon, 5 Aug 2019 19:28:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1565026136; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=UzPdUpvl0dRKl8TMGlyXuwODVXEURuPBgcAqGADqqlA=; b=boGMj2jpp6i9ocDKXpnCiTe/WAIP/gdEGzQ98H5WJGQg23ZuVuR23WOzIqPCm1l983a3fE jhLgXUcwmK2PHhOnFKlWihhyBRlkp3e85cLOaIaACpmSUx9chFUHFjiNMYrmwpVN496aMr Cbw+XyZ0dWKTd8PE4PZHeG/JAJv6kIc= Date: Mon, 5 Aug 2019 19:28:54 +0200 From: Borislav Petkov To: Thomas Garnier Cc: kernel-hardening@lists.openwall.com, kristen@linux.intel.com, keescook@chromium.org, Andy Lutomirski , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v9 04/11] x86/entry/64: Adapt assembly for PIE support Message-ID: <20190805172854.GF18785@zn.tnic> References: <20190730191303.206365-1-thgarnie@chromium.org> <20190730191303.206365-5-thgarnie@chromium.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20190730191303.206365-5-thgarnie@chromium.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 30, 2019 at 12:12:48PM -0700, Thomas Garnier wrote: > Change the assembly code to use only relative references of symbols for the > kernel to be PIE compatible. > > Position Independent Executable (PIE) support will allow to extend the > KASLR randomization range below 0xffffffff80000000. > > Signed-off-by: Thomas Garnier > Reviewed-by: Kees Cook > --- > arch/x86/entry/entry_64.S | 16 +++++++++++----- > 1 file changed, 11 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S > index 3f5a978a02a7..4b588a902009 100644 > --- a/arch/x86/entry/entry_64.S > +++ b/arch/x86/entry/entry_64.S > @@ -1317,7 +1317,8 @@ ENTRY(error_entry) > movl %ecx, %eax /* zero extend */ > cmpq %rax, RIP+8(%rsp) > je .Lbstep_iret > - cmpq $.Lgs_change, RIP+8(%rsp) > + leaq .Lgs_change(%rip), %rcx > + cmpq %rcx, RIP+8(%rsp) > jne .Lerror_entry_done > > /* > @@ -1514,10 +1515,10 @@ ENTRY(nmi) > * resume the outer NMI. > */ > > - movq $repeat_nmi, %rdx > + leaq repeat_nmi(%rip), %rdx > cmpq 8(%rsp), %rdx > ja 1f > - movq $end_repeat_nmi, %rdx > + leaq end_repeat_nmi(%rip), %rdx > cmpq 8(%rsp), %rdx > ja nested_nmi_out > 1: > @@ -1571,7 +1572,8 @@ nested_nmi: > pushq %rdx > pushfq > pushq $__KERNEL_CS > - pushq $repeat_nmi > + leaq repeat_nmi(%rip), %rdx > + pushq %rdx > > /* Put stack back */ > addq $(6*8), %rsp > @@ -1610,7 +1612,11 @@ first_nmi: > addq $8, (%rsp) /* Fix up RSP */ > pushfq /* RFLAGS */ > pushq $__KERNEL_CS /* CS */ > - pushq $1f /* RIP */ > + pushq $0 /* Future return address */ > + pushq %rax /* Save RAX */ > + leaq 1f(%rip), %rax /* RIP */ > + movq %rax, 8(%rsp) /* Put 1f on return address */ > + popq %rax /* Restore RAX */ Can't you just use a callee-clobbered reg here instead of preserving %rax? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.