Re: [PATCH 1/2] drm: add cache support for arm64

Christoph Hellwig
2019-08-07T06:25:52Z

On Tue, Aug 06, 2019 at 09:23:51AM -0700, Rob Clark wrote:
> On Tue, Aug 6, 2019 at 8:50 AM Christoph Hellwig <hch@lst.de> wrote:
> >
> > On Tue, Aug 06, 2019 at 07:11:41AM -0700, Rob Clark wrote:
> > > Agreed that drm_cflush_* isn't a great API. In this particular case
> > > (IIUC), I need wb+inv so that there aren't dirty cache lines that drop
> > > out to memory later, and so that I don't get a cache hit on
> > > uncached/wc mmap'ing.
> >
> > So what is the use case here? Allocate pages using the page allocator
> > (or CMA for that matter), and then mmaping them to userspace and never
> > touching them again from the kernel?
>
> Currently, it is pages coming from tmpfs. Ideally we want pages that
> are swappable when unpinned.

tmpfs is basically a (complicated) frontend for alloc pages as far
as page allocation is concerned.

> CPU mappings are *mostly* just mapping to userspace. There are a few
> exceptions that are vmap'd (fbcon, and ringbuffer).

And those use the same backend?

> (Eventually I'd like to support pages passed in from userspace.. but
> that is down the road.)

Eww. Please talk to the iommu list before starting on that.

> > > Tying it in w/ iommu seems a bit weird to me.. but maybe that is just
> > > me, I'm certainly willing to consider proposals or to try things and
> > > see how they work out.
> >
> > This was just my through as the fit seems easy. But maybe you'll
> > need to explain your use case(s) a bit more so that we can figure out
> > what a good high level API is.
>
> Tying it to iommu_map/unmap would be awkward, as we could need to
> setup cpu mmap before it ends up mapped to iommu. And the plan to
> support per-process pagetables involved creating an iommu_domain per
> userspace gl context.. some buffers would end up mapped into multiple
> contexts/iommu_domains.
>
> If the cache operation was detached from iommu_map/unmap, then it
> would seem weird to be part of the iommu API.
>
> I guess I'm not entirely sure what you had in mind, but this is why
> iommu seemed to me like a bad fit.

So back to the question, I'd like to understand your use case (and
maybe hear from the other drm folks if that is common):

- you allocate pages from shmem (why shmem, btw? if this is done by
other drm drivers how do they guarantee addressability without an
iommu?)
- then the memory is either mapped to userspace or vmapped (or even
both, althrough the lack of aliasing you mentioned would speak
against it) as writecombine (aka arm v6+ normal uncached). Does
the mapping live on until the memory is freed?
- as you mention swapping - how do you guarantee there are no
aliases in the kernel direct mapping after the page has been swapped
in?
- then the memory is potentially mapped to the iommu. Is it using
a long-living mapping, or does get unmapped/remapped repeatedly?