From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64932C3A5A6 for ; Sat, 31 Aug 2019 15:44:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3585B22D37 for ; Sat, 31 Aug 2019 15:44:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728444AbfHaPoi (ORCPT ); Sat, 31 Aug 2019 11:44:38 -0400 Received: from mga09.intel.com ([134.134.136.24]:54521 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727657AbfHaPoi (ORCPT ); Sat, 31 Aug 2019 11:44:38 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Aug 2019 08:44:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,451,1559545200"; d="scan'208";a="198257832" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by fmsmga001.fm.intel.com with SMTP; 31 Aug 2019 08:44:33 -0700 Received: by lahna (sSMTP sendmail emulation); Sat, 31 Aug 2019 18:44:32 +0300 Date: Sat, 31 Aug 2019 18:44:32 +0300 From: Mika Westerberg To: Jethro Beekman Cc: Marek Vasut , Tudor Ambarus , David Woodhouse , Brian Norris , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Allison Randal , Thomas Gleixner , Enrico Weigelt , "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash Message-ID: <20190831154432.GS3177@lahna.fi.intel.com> References: <6cc18e41-82a6-942b-6d91-6297f73a33da@fortanix.com> <20190831133616.GQ3177@lahna.fi.intel.com> <74545c4c-a9fc-77c8-cb54-6fbf747f0eea@fortanix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <74545c4c-a9fc-77c8-cb54-6fbf747f0eea@fortanix.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.12.1 (2019-06-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 31, 2019 at 03:29:21PM +0000, Jethro Beekman wrote: > > > + ispi->sregs = NULL; > > > + ispi->pregs = ispi->base + CNL_PR; > > > + ispi->nregions = CNL_FREG_NUM; > > > + ispi->pr_num = CNL_PR_NUM; > > > > Does CNL really have a different number of PR and FR regions than the > > previous generations? > > I'm using this as a reference: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf > . If you have more accurate information, please let me know. No looks correct to me. I think it is a good idea to mention this in the changelog, though.