From: Joerg Roedel <joro@8bytes.org>
To: Kyung Min Park <kyung.min.park@intel.com>
Cc: dwmw2@infradead.org, iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org, sohil.mehta@intel.com,
ashok.raj@intel.com, jacob.jun.pan@linux.intel.com,
baolu.lu@intel.com, andriy.shevchenko@intel.com
Subject: Re: [PATCH] iommu/vt-d: Add Scalable Mode fault information
Date: Tue, 10 Sep 2019 10:08:23 +0200 [thread overview]
Message-ID: <20190910080823.GA3247@8bytes.org> (raw)
In-Reply-To: <1567793642-17063-1-git-send-email-kyung.min.park@intel.com>
On Fri, Sep 06, 2019 at 11:14:02AM -0700, Kyung Min Park wrote:
> Intel VT-d specification revision 3 added support for Scalable Mode
> Translation for DMA remapping. Add the Scalable Mode fault reasons to
> show detailed fault reasons when the translation fault happens.
>
> Link: https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf
>
> Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>
> Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
> ---
> drivers/iommu/dmar.c | 77 ++++++++++++++++++++++++++++++++++++++++++---
> include/linux/intel-iommu.h | 2 ++
> 2 files changed, 75 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
> index 1207e05..5cb63c5 100644
> --- a/drivers/iommu/dmar.c
> +++ b/drivers/iommu/dmar.c
> @@ -1532,6 +1532,64 @@ static const char *dma_remap_fault_reasons[] =
> "PCE for translation request specifies blocking",
> };
>
> +static const char * const dma_remap_sm_fault_reasons[] = {
> + "SM: Invalid Root Table Address",
> + "SM: TTM 0 for request with PASID",
> + "SM: TTM 0 for page group request",
> + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x33-0x37 */
> + "SM: Error attempting to access Root Entry",
> + "SM: Present bit in Root Entry is clear",
> + "SM: Non-zero reserved field set in Root Entry",
> + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x3B-0x3F */
> + "SM: Error attempting to access Context Entry",
> + "SM: Present bit in Context Entry is clear",
> + "SM: Non-zero reserved field set in the Context Entry",
> + "SM: Invalid Context Entry",
> + "SM: DTE field in Context Entry is clear",
> + "SM: PASID Enable field in Context Entry is clear",
> + "SM: PASID is larger than the max in Context Entry",
> + "SM: PRE field in Context-Entry is clear",
> + "SM: RID_PASID field error in Context-Entry",
> + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", /* 0x49-0x4F */
Maybe add the number (0x49-0x4f) to the respecting "Unknown" fields? If
we can't give a reason we should give the number for easier debugging in
the future. Same for the "Unknown" fields below.
Other than that, the patch looks good.
Regards,
Joerg
next prev parent reply other threads:[~2019-09-10 8:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-06 18:14 [PATCH] iommu/vt-d: Add Scalable Mode fault information Kyung Min Park
2019-09-10 8:08 ` Joerg Roedel [this message]
2019-09-10 17:30 ` Mehta, Sohil
2019-09-11 10:37 ` joro
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