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[46.139.12.213]) by smtp.gmail.com with ESMTPSA id t6sm104711wmf.8.2019.09.16.07.53.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2019 07:53:07 -0700 (PDT) Date: Mon, 16 Sep 2019 16:53:05 +0200 From: Ingo Molnar To: Dave Hansen Cc: "Kirill A. Shutemov" , Linus Torvalds , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Dave Hansen , Andy Lutomirski , Peter Zijlstra , x86@kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] x86/mm: Enable 5-level paging support by default Message-ID: <20190916145305.GA30629@gmail.com> References: <20190913095452.40592-1-kirill.shutemov@linux.intel.com> <8435951c-d88a-a5c6-5328-90c9f2521664@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8435951c-d88a-a5c6-5328-90c9f2521664@intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Dave Hansen wrote: > On 9/13/19 2:54 AM, Kirill A. Shutemov wrote: > > The next major release of distributions expected to have > > CONFIG_X86_5LEVEL=y. > > It's probably worth noting that this exposes to two kinds of possible > performance issues: > > First is the overhead of having the 5-level code on 4-level hardware. > We haven't seen any regressions there in quite a while. Kirill talked > about this in the changelog. > > Second is the overhead of having 5-level paging active on 5-level > hardware versus using 4-level paging on hardware *capable* of 5-level. > That is, of course, much harder to measure since 5-level hardware is not > publicly available. But, we've tested this quite a bit and we're pretty > confident that it will not cause regressions, especially on systems > where apps don't opt in to the larger address space. > > I do think endeavoring to have mainline's defaults match the most common > distro configs is a good idea, and now is as good of a time as any. > > Acked-by: Dave Hansen Ok - in terms of timing it's obviously *way* too late for v5.4, so I've queued it up for the v5.5 merge window in tip:x86/mm. This should give it 2-3 months of additional testing to shake out any weird interactions and quirks. Thanks, Ingo