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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id b5sm757007otp.36.2019.09.17.07.23.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Sep 2019 07:23:38 -0700 (PDT) Date: Tue, 17 Sep 2019 09:23:37 -0500 From: Rob Herring To: "Ramuthevar,Vadivel MuruganX" Cc: kishon@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, andriy.shevchenko@intel.com, cheol.yong.kim@intel.com, qi-ming.wu@intel.com, peter.harliman.liem@intel.com Subject: Re: [PATCH v5 1/2] dt-bindings: phy: intel-emmc-phy: Add YAML schema for LGM eMMC PHY Message-ID: <20190917142337.GA27151@bogus> References: <20190904055344.25512-1-vadivel.muruganx.ramuthevar@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190904055344.25512-1-vadivel.muruganx.ramuthevar@linux.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 04, 2019 at 01:53:43PM +0800, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan > > Add a YAML schema to use the host controller driver with the > eMMC PHY on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan > --- > changes in v5: > - earlier Review-by tag given by Rob > - rework done with syscon parent node. > > changes in v4: > - As per Rob's review: validate 5.2 and 5.3 > - drop unrelated items. > > changes in v3: > - resolve 'make dt_binding_check' warnings > > changes in v2: > As per Rob Herring review comments, the following updates > - change GPL-2.0 -> (GPL-2.0-only OR BSD-2-Clause) > - filename is the compatible string plus .yaml > - LGM: Lightning Mountain > - update maintainer > - add intel,syscon under property list > - keep one example instead of two > --- > .../bindings/phy/intel,lgm-emmc-phy.yaml | 69 ++++++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml > new file mode 100644 > index 000000000000..8f6ac8b3da42 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings > + > +maintainers: > + - Ramuthevar Vadivel Murugan > + > +description: Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon > + node is used to reference the base address of eMMC phy registers. > + > +select: > + properties: > + compatible: > + contains: > + const: intel,lgm-syscon This, plus... > + > + reg: > + maxItems: 1 > + > + required: > + - compatible > + - reg > + > +properties: > + "#phy-cells": > + const: 0 > + > + compatible: > + contains: > + const: intel,lgm-emmc-phy ...this should not pass validation as they contradict each other. > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + maxItems: 1 > + > +required: > + - "#phy-cells" > + - compatible > + - reg > + - clocks > + - clock-names > + > +examples: > + - | > + sysconf: chiptop@e0200000 { > + compatible = "intel,lgm-syscon"; > + reg = <0xe0200000 0x100>; I'm still waiting for a complete description of what all is in this block. > + > + emmc-phy: emmc-phy { > + compatible = "intel,lgm-emmc-phy"; > + reg = <0x00a8 0x4>, > + <0x00ac 0x4>, > + <0x00b0 0x4>, > + <0x00b4 0x4>; Looks contiguous and can be a single entry: <0xa8 0x10> > + clocks = <&emmc>; > + clock-names = "emmcclk"; > + #phy-cells = <0>; > + }; > + }; > +... > -- > 2.11.0 >