From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F677C3A5A2 for ; Sun, 22 Sep 2019 19:22:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 68BD220869 for ; Sun, 22 Sep 2019 19:22:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569180150; bh=OOYbtDl++mAga3Ve0irijuGjJiSWW+eTKM4eu1A5L8A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=oALafnQ6t7F/ubiu6+DYDoknMah6/BAQziQFI23We9fVIIvb9ErOK6X7JW2H99dUK T3f3Xxa/TAfvCnVtpjG1A39v0gKzEuEf5MfOBPkv221QE0js2QA+5cZ+FYYOZCewSR 5yoirC7t9kb+zlNdQ9OZ7lp63bseVynCOAJOxsd4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731153AbfIVTW3 (ORCPT ); Sun, 22 Sep 2019 15:22:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:53920 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388137AbfIVSxu (ORCPT ); Sun, 22 Sep 2019 14:53:50 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9B6F0208C2; Sun, 22 Sep 2019 18:53:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1569178429; bh=OOYbtDl++mAga3Ve0irijuGjJiSWW+eTKM4eu1A5L8A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LdTfI+U53TTo24kaBHz4Jl/AMEa8AlUWzUu/gyjI0zlOdmL1AedQDveLIUp9Nx+gW rEs8ZkHQYLYMObd6IUAm87PWoQLdVJmpl7/VWO4AM1iAstlQmFmmmPxxpOU2uWbH3m ZiMiXP8n8M8xE6PliC9xd+qGx4RHS1a//wJHCQBM= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Al Cooper , Adrian Hunter , Ulf Hansson , Sasha Levin , linux-mmc@vger.kernel.org Subject: [PATCH AUTOSEL 5.2 165/185] mmc: sdhci: Fix incorrect switch to HS mode Date: Sun, 22 Sep 2019 14:49:03 -0400 Message-Id: <20190922184924.32534-165-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190922184924.32534-1-sashal@kernel.org> References: <20190922184924.32534-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Al Cooper [ Upstream commit c894e33ddc1910e14d6f2a2016f60ab613fd8b37 ] When switching from any MMC speed mode that requires 1.8v (HS200, HS400 and HS400ES) to High Speed (HS) mode, the system ends up configured for SDR12 with a 50MHz clock which is an illegal mode. This happens because the SDHCI_CTRL_VDD_180 bit in the SDHCI_HOST_CONTROL2 register is left set and when this bit is set, the speed mode is controlled by the SDHCI_CTRL_UHS field in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling() because there is no UHS mode being set. The fix is to change sdhci_set_uhs_signaling() to set the SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for any switch to HS mode. This was found on a new eMMC controller that does strict checking of the speed mode and the corresponding clock rate. It caused the switch to HS400 mode to fail because part of the sequence to switch to HS400 requires a switch from HS200 to HS before going to HS400. Suggested-by: Adrian Hunter Signed-off-by: Al Cooper Signed-off-by: Ulf Hansson Signed-off-by: Sasha Levin --- drivers/mmc/host/sdhci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index a5dc5aae973e6..c66e66fbaeb40 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1849,7 +1849,9 @@ void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing) ctrl_2 |= SDHCI_CTRL_UHS_SDR104; else if (timing == MMC_TIMING_UHS_SDR12) ctrl_2 |= SDHCI_CTRL_UHS_SDR12; - else if (timing == MMC_TIMING_UHS_SDR25) + else if (timing == MMC_TIMING_SD_HS || + timing == MMC_TIMING_MMC_HS || + timing == MMC_TIMING_UHS_SDR25) ctrl_2 |= SDHCI_CTRL_UHS_SDR25; else if (timing == MMC_TIMING_UHS_SDR50) ctrl_2 |= SDHCI_CTRL_UHS_SDR50; -- 2.20.1