Re: [PATCH v6 4/6] drm/i915/gvt: Deliver vGPU refresh event to userspace

kbuild test robot
2019-09-24T09:03:42Z

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Hi Tina,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v5.3 next-20190920]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url: https://github.com/0day-ci/linux/commits/Tina-Zhang/Deliver-vGPU-display-refresh-event-to-userspace/20190924-145111
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-fedora-25 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-13) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

drivers/gpu/drm/i915/gvt/display.c: In function 'emulate_vblank_on_pipe':
>> drivers/gpu/drm/i915/gvt/display.c:429:10: error: 'struct intel_vgpu' has no member named 'vdev'
if (vgpu->vdev.vblank_trigger && !vgpu->vdev.display_event_mask &&
^~
drivers/gpu/drm/i915/gvt/display.c:429:40: error: 'struct intel_vgpu' has no member named 'vdev'
if (vgpu->vdev.vblank_trigger && !vgpu->vdev.display_event_mask &&
^~
drivers/gpu/drm/i915/gvt/display.c:431:22: error: 'struct intel_vgpu' has no member named 'vdev'
eventfd_signal(vgpu->vdev.vblank_trigger, eventfd_signal_val);
^~

vim +429 drivers/gpu/drm/i915/gvt/display.c

393
394 static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe)
395 {
396 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
397 struct intel_vgpu_irq *irq = &vgpu->irq;
398 int vblank_event[] = {
399 [PIPE_A] = PIPE_A_VBLANK,
400 [PIPE_B] = PIPE_B_VBLANK,
401 [PIPE_C] = PIPE_C_VBLANK,
402 };
403 int pri_flip_event = SKL_FLIP_EVENT(pipe, PLANE_PRIMARY);
404 int event;
405 u64 eventfd_signal_val = 0;
406
407 if (pipe < PIPE_A || pipe > PIPE_C)
408 return;
409
410 for_each_set_bit(event, irq->flip_done_event[pipe],
411 INTEL_GVT_EVENT_MAX) {
412 clear_bit(event, irq->flip_done_event[pipe]);
413 if (!pipe_is_enabled(vgpu, pipe))
414 continue;
415
416 if (event == pri_flip_event)
417 eventfd_signal_val |= DISPLAY_PRI_REFRESH_EVENT_VAL;
418
419 intel_vgpu_trigger_virtual_event(vgpu, event);
420 }
421
422 if (eventfd_signal_val)
423 vgpu->no_pageflip_count = 0;
424 else if (!eventfd_signal_val && vgpu->no_pageflip_count > PAGEFLIP_DELAY_THR)
425 eventfd_signal_val |= DISPLAY_PRI_REFRESH_EVENT_VAL;
426 else
427 vgpu->no_pageflip_count++;
428
> 429 if (vgpu->vdev.vblank_trigger && !vgpu->vdev.display_event_mask &&
430 eventfd_signal_val)
431 eventfd_signal(vgpu->vdev.vblank_trigger, eventfd_signal_val);
432
433 if (pipe_is_enabled(vgpu, pipe)) {
434 vgpu_vreg_t(vgpu, PIPE_FRMCOUNT_G4X(pipe))++;
435 intel_vgpu_trigger_virtual_event(vgpu, vblank_event[pipe]);
436 }
437 }
438

---
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