From: Christoph Hellwig <hch@infradead.org>
To: Atish Patra <atish.patra@wdc.com>
Cc: linux-kernel@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
Richard Fontana <rfontana@redhat.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Palmer Dabbelt <palmer@sifive.com>,
Johan Hovold <johan@kernel.org>,
Alexandre Ghiti <aghiti@upmem.com>,
Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Anup Patel <anup@brainfault.org>,
Andrew Morton <akpm@linux-foundation.org>,
linux-riscv@lists.infradead.org
Subject: Re: [v1 PATCH 2/2] RISC-V: Consolidate isa correctness check
Date: Tue, 8 Oct 2019 08:44:08 -0700 [thread overview]
Message-ID: <20191008154408.GC20318@infradead.org> (raw)
In-Reply-To: <20191004012000.2661-3-atish.patra@wdc.com>
> +int riscv_read_check_isa(struct device_node *node, const char **isa)
> +{
> + u32 hart;
> +
> + if (of_property_read_u32(node, "reg", &hart)) {
> + pr_warn("Found CPU without hart ID\n");
> + return -ENODEV;
> + }
> +
> + if (of_property_read_string(node, "riscv,isa", isa)) {
> + pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n",
> + hart);
> + return -ENODEV;
> + }
> +
> + /*
> + * Linux doesn't support rv32e or rv128i, and we only support booting
> + * kernels on harts with the same ISA that the kernel is compiled for.
> + */
> +#if defined(CONFIG_32BIT)
> + if (strncmp(*isa, "rv32i", 5) != 0)
> + return -ENODEV;
> +#elif defined(CONFIG_64BIT)
> + if (strncmp(*isa, "rv64i", 5) != 0)
> + return -ENODEV;
> +#endif
Using IS_ENABLED here would clean the checks up a bit.
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index b1ade9a49347..eaad5aa07403 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -38,10 +38,8 @@ void riscv_fill_hwcap(void)
> if (riscv_of_processor_hartid(node) < 0)
> continue;
>
> - if (of_property_read_string(node, "riscv,isa", &isa)) {
> - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n");
> + if (riscv_read_check_isa(node, &isa) < 0)
> continue;
Do we really get rid of warnings if we didn't find anything proper?
next prev parent reply other threads:[~2019-10-08 15:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-04 1:19 [v1 PATCH 0/2] Cleanup isa string access and print Atish Patra
2019-10-04 1:19 ` [v1 PATCH 1/2] RISC-V: Remove unsupported isa string info print Atish Patra
2019-10-08 15:39 ` Christoph Hellwig
2019-10-04 1:20 ` [v1 PATCH 2/2] RISC-V: Consolidate isa correctness check Atish Patra
2019-10-08 15:44 ` Christoph Hellwig [this message]
2019-10-09 22:02 ` Atish Patra
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