From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 180F0CA9EB6 for ; Wed, 23 Oct 2019 10:14:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E856E21920 for ; Wed, 23 Oct 2019 10:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404339AbfJWKOC (ORCPT ); Wed, 23 Oct 2019 06:14:02 -0400 Received: from mx2.suse.de ([195.135.220.15]:53858 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404161AbfJWKNd (ORCPT ); Wed, 23 Oct 2019 06:13:33 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 85CCDB638; Wed, 23 Oct 2019 10:13:31 +0000 (UTC) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 09/11] ARM: dts: rtd1195: Add UART resets Date: Wed, 23 Oct 2019 12:13:15 +0200 Message-Id: <20191023101317.26656-10-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber --- v2: New arch/arm/boot/dts/rtd1195.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index fdcaf48a26f2..e2cdcbcf70f4 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -128,6 +128,7 @@ reg = <0x18007800 0x400>; reg-shift = <2>; reg-io-width = <4>; + resets = <&iso_reset 8>; clock-frequency = <27000000>; status = "disabled"; }; @@ -137,6 +138,7 @@ reg = <0x1801b200 0x100>; reg-shift = <2>; reg-io-width = <4>; + resets = <&reset2 28>; clock-frequency = <27000000>; status = "disabled"; }; -- 2.16.4