Re: [PATCH 01/12] riscv: abstract out CSR names for supervisor vs machine mode

Marc Zyngier
2019-11-05T18:01:58Z

Hi Paul,

On 2019-11-05 19:06, Paul Walmsley wrote:
> Jason, Marc, Thomas,
>
> On Mon, 28 Oct 2019, Christoph Hellwig wrote:
>
>> Many of the privileged CSRs exist in a supervisor and machine
>> version
>> that are used very similarly. Provide versions of the CSR names and
>> fields that map to either the S-mode or M-mode variant depending on
>> a new CONFIG_RISCV_M_MODE kconfig symbol.
>>
>> Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>
>> and Paul Walmsley <paul.walmsley@sifive.com>.
>>
>> Signed-off-by: Christoph Hellwig <hch@lst.de>
>
> Care to give a quick ack to the drivers/irqchip changes?

Sure, see below.

>
>
> thanks,
>
> - Paul
>
>
>> ---
>> arch/riscv/Kconfig | 4 ++
>> arch/riscv/include/asm/csr.h | 72
>> +++++++++++++++++++++++++----
>> arch/riscv/include/asm/irqflags.h | 12 ++---
>> arch/riscv/include/asm/processor.h | 2 +-
>> arch/riscv/include/asm/ptrace.h | 16 +++----
>> arch/riscv/include/asm/switch_to.h | 10 ++--
>> arch/riscv/kernel/asm-offsets.c | 8 ++--
>> arch/riscv/kernel/entry.S | 74
>> +++++++++++++++++-------------
>> arch/riscv/kernel/fpu.S | 8 ++--
>> arch/riscv/kernel/head.S | 12 ++---
>> arch/riscv/kernel/irq.c | 17 ++-----
>> arch/riscv/kernel/perf_callchain.c | 2 +-
>> arch/riscv/kernel/process.c | 17 +++----
>> arch/riscv/kernel/signal.c | 21 ++++-----
>> arch/riscv/kernel/smp.c | 2 +-
>> arch/riscv/kernel/traps.c | 16 +++----
>> arch/riscv/lib/uaccess.S | 12 ++---
>> arch/riscv/mm/extable.c | 4 +-
>> arch/riscv/mm/fault.c | 6 +--
>> drivers/clocksource/timer-riscv.c | 8 ++--
>> drivers/irqchip/irq-sifive-plic.c | 11 +++--
>> 21 files changed, 199 insertions(+), 135 deletions(-)

[...]

>> diff --git a/drivers/irqchip/irq-sifive-plic.c
>> b/drivers/irqchip/irq-sifive-plic.c
>> index 7d0a12fe2714..8df547d2d935 100644
>> --- a/drivers/irqchip/irq-sifive-plic.c
>> +++ b/drivers/irqchip/irq-sifive-plic.c
>> @@ -181,7 +181,7 @@ static void plic_handle_irq(struct pt_regs
>> *regs)
>>
>> WARN_ON_ONCE(!handler->present);
>>
>> - csr_clear(sie, SIE_SEIE);
>> + csr_clear(CSR_IE, IE_EIE);
>> while ((hwirq = readl(claim))) {
>> int irq = irq_find_mapping(plic_irqdomain, hwirq);
>>
>> @@ -191,7 +191,7 @@ static void plic_handle_irq(struct pt_regs
>> *regs)
>> else
>> generic_handle_irq(irq);
>> }
>> - csr_set(sie, SIE_SEIE);
>> + csr_set(CSR_IE, IE_EIE);
>> }
>>
>> /*
>> @@ -252,8 +252,11 @@ static int __init plic_init(struct device_node
>> *node,
>> continue;
>> }
>>
>> - /* skip contexts other than supervisor external interrupt */
>> - if (parent.args[0] != IRQ_S_EXT)
>> + /*
>> + * Skip contexts other than external interrupts for our
>> + * privilege level.
>> + */
>> + if (parent.args[0] != IRQ_EXT)
>> continue;
>>
>> hartid = plic_find_hart_id(parent.np);

For changes to this file:

Acked-by: Marc Zyngier <maz@kernel.org>

M.
--
Jazz is not dead. It just smells funny...