Re: [PATCH v1 11/29] ARM: tegra: Add interconnect properties to Tegra124 device-tree

Thierry Reding
2019-11-19T06:27:22Z

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On Mon, Nov 18, 2019 at 11:02:29PM +0300, Dmitry Osipenko wrote:
> Add interconnect properties to the memory controller, external memory
> controller and the display controller nodes to describe interconnection
> of these nodes.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> arch/arm/boot/dts/tegra124.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> index 413bfb981de8..5069af3011cc 100644
> --- a/arch/arm/boot/dts/tegra124.dtsi
> +++ b/arch/arm/boot/dts/tegra124.dtsi
> @@ -3,6 +3,7 @@
> #include <dt-bindings/gpio/tegra-gpio.h>
> #include <dt-bindings/memory/tegra124-mc.h>
> #include <dt-bindings/pinctrl/pinctrl-tegra.h>
> +#include <dt-bindings/interconnect/tegra-icc.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/reset/tegra124-car.h>
> #include <dt-bindings/thermal/tegra124-soctherm.h>
> @@ -111,6 +112,9 @@
> iommus = <&mc TEGRA_SWGROUP_DC>;
>
> nvidia,head = <0>;
> +
> + interconnects = <&mc TEGRA_ICC_MC_DC &emc TEGRA_ICC_EMEM>;
> + interconnect-names = "dma-mem";

I don't think this is quite correct. The display controller is not
connected to the EMC. Instead, requests go to the MC which then forwards
them to the EMC. So I think we really only need the one connection here.
There are some clients that are read/write and they may need extra
entries, but all connections from memory clients should be to the MC,
not the EMC.

Thierry

> };
>
> dc@54240000 {
> @@ -126,6 +130,9 @@
> iommus = <&mc TEGRA_SWGROUP_DCB>;
>
> nvidia,head = <1>;
> +
> + interconnects = <&mc TEGRA_ICC_MC_DCB &emc TEGRA_ICC_EMEM>;
> + interconnect-names = "dma-mem";
> };
>
> hdmi: hdmi@54280000 {
> @@ -620,6 +627,7 @@
> interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
>
> #iommu-cells = <1>;
> + #interconnect-cells = <1>;
> };
>
> emc: emc@7001b000 {
> @@ -627,6 +635,8 @@
> reg = <0x0 0x7001b000 0x0 0x1000>;
>
> nvidia,memory-controller = <&mc>;
> +
> + #interconnect-cells = <1>;
> };
>
> sata@70020000 {
> --
> 2.23.0
>

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