* [PATCH 0/2] x86/insn: Add some Intel instructions to the opcode map
@ 2019-11-15 13:54 Adrian Hunter
2019-11-15 13:54 ` [PATCH 1/2] x86/insn: perf tools: Add some instructions to the new instructions test Adrian Hunter
2019-11-15 13:54 ` [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter
0 siblings, 2 replies; 7+ messages in thread
From: Adrian Hunter @ 2019-11-15 13:54 UTC (permalink / raw)
To: x86
Cc: Arnaldo Carvalho de Melo, Jiri Olsa, linux-kernel,
Thomas Gleixner, Ingo Molnar, Borislav Petkov, H Peter Anvin,
Andi Kleen, Peter Zijlstra, Masami Hiramatsu
Hi
Here is a patch to update the x86 opcode map, and a patch to update the
perf tools' "new instructions" test accordingly.
There are still a lot of AVX instructions to add and also
CET instructions, which Yu-cheng is adding.
Adrian Hunter (2):
x86/insn: perf tools: Add some instructions to the new instructions test
x86/insn: Add some Intel instructions to the opcode map
arch/x86/lib/x86-opcode-map.txt | 18 +++--
tools/arch/x86/lib/x86-opcode-map.txt | 18 +++--
tools/perf/arch/x86/tests/insn-x86-dat-32.c | 52 +++++++++++++
tools/perf/arch/x86/tests/insn-x86-dat-64.c | 62 +++++++++++++++
tools/perf/arch/x86/tests/insn-x86-dat-src.c | 109 +++++++++++++++++++++++++++
5 files changed, 247 insertions(+), 12 deletions(-)
Regards
Adrian
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/2] x86/insn: perf tools: Add some instructions to the new instructions test 2019-11-15 13:54 [PATCH 0/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter @ 2019-11-15 13:54 ` Adrian Hunter 2019-11-19 16:56 ` [tip: perf/core] " tip-bot2 for Adrian Hunter 2019-11-15 13:54 ` [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter 1 sibling, 1 reply; 7+ messages in thread From: Adrian Hunter @ 2019-11-15 13:54 UTC (permalink / raw) To: x86 Cc: Arnaldo Carvalho de Melo, Jiri Olsa, linux-kernel, Thomas Gleixner, Ingo Molnar, Borislav Petkov, H Peter Anvin, Andi Kleen, Peter Zijlstra, Masami Hiramatsu Add to the "x86 instruction decoder - new instructions" test the following instructions: cldemote tpause umonitor umwait movdiri movdir64b enqcmd enqcmds encls enclu enclv pconfig wbnoinvd For information about the instructions, refer Intel SDM May 2019 (325462-070US) and Intel Architecture Instruction Set Extensions May 2019 (319433-037). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> --- tools/perf/arch/x86/tests/insn-x86-dat-32.c | 52 +++++++++ tools/perf/arch/x86/tests/insn-x86-dat-64.c | 62 +++++++++++ tools/perf/arch/x86/tests/insn-x86-dat-src.c | 109 +++++++++++++++++++ 3 files changed, 223 insertions(+) diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-32.c b/tools/perf/arch/x86/tests/insn-x86-dat-32.c index fab3c6de73fa..58f8f2a095c4 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-32.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-32.c @@ -1647,6 +1647,12 @@ "0f ae 30 \txsaveopt (%eax)",}, {{0x0f, 0xae, 0xf0, }, 3, 0, "", "", "0f ae f0 \tmfence ",}, +{{0x0f, 0x1c, 0x00, }, 3, 0, "", "", +"0f 1c 00 \tcldemote (%eax)",}, +{{0x0f, 0x1c, 0x05, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", +"0f 1c 05 78 56 34 12 \tcldemote 0x12345678",}, +{{0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%eax,%ecx,8)",}, {{0x0f, 0xc7, 0x20, }, 3, 0, "", "", "0f c7 20 \txsavec (%eax)",}, {{0x0f, 0xc7, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", @@ -1677,3 +1683,49 @@ "f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",}, {{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", "f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",}, +{{0x66, 0x0f, 0xae, 0xf3, }, 4, 0, "", "", +"66 0f ae f3 \ttpause %ebx",}, +{{0x67, 0xf3, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"67 f3 0f ae f0 \tumonitor %ax",}, +{{0xf3, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f3 0f ae f0 \tumonitor %eax",}, +{{0xf2, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f2 0f ae f0 \tumwait %eax",}, +{{0x0f, 0x38, 0xf9, 0x03, }, 4, 0, "", "", +"0f 38 f9 03 \tmovdiri %eax,(%ebx)",}, +{{0x0f, 0x38, 0xf9, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 38 f9 88 78 56 34 12 \tmovdiri %ecx,0x12345678(%eax)",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"66 0f 38 f8 18 \tmovdir64b (%eax),%ebx",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%eax),%ecx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "", +"67 66 0f 38 f8 1c \tmovdir64b (%si),%bx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "", +"67 66 0f 38 f8 8c 34 12 \tmovdir64b 0x1234(%si),%cx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f2 0f 38 f8 18 \tenqcmd (%eax),%ebx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%eax),%ecx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "", +"67 f2 0f 38 f8 1c \tenqcmd (%si),%bx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "", +"67 f2 0f 38 f8 8c 34 12 \tenqcmd 0x1234(%si),%cx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f3 0f 38 f8 18 \tenqcmds (%eax),%ebx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "", +"67 f3 0f 38 f8 1c \tenqcmds (%si),%bx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "", +"67 f3 0f 38 f8 8c 34 12 \tenqcmds 0x1234(%si),%cx",}, +{{0x0f, 0x01, 0xcf, }, 3, 0, "", "", +"0f 01 cf \tencls ",}, +{{0x0f, 0x01, 0xd7, }, 3, 0, "", "", +"0f 01 d7 \tenclu ",}, +{{0x0f, 0x01, 0xc0, }, 3, 0, "", "", +"0f 01 c0 \tenclv ",}, +{{0x0f, 0x01, 0xc5, }, 3, 0, "", "", +"0f 01 c5 \tpconfig ",}, +{{0xf3, 0x0f, 0x09, }, 3, 0, "", "", +"f3 0f 09 \twbnoinvd ",}, diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-64.c b/tools/perf/arch/x86/tests/insn-x86-dat-64.c index c57f34603b9b..656f8aed31de 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-64.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-64.c @@ -1667,6 +1667,16 @@ "41 0f ae 30 \txsaveopt (%r8)",}, {{0x0f, 0xae, 0xf0, }, 3, 0, "", "", "0f ae f0 \tmfence ",}, +{{0x0f, 0x1c, 0x00, }, 3, 0, "", "", +"0f 1c 00 \tcldemote (%rax)",}, +{{0x41, 0x0f, 0x1c, 0x00, }, 4, 0, "", "", +"41 0f 1c 00 \tcldemote (%r8)",}, +{{0x0f, 0x1c, 0x04, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 1c 04 25 78 56 34 12 \tcldemote 0x12345678",}, +{{0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%rax,%rcx,8)",}, +{{0x41, 0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"41 0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%r8,%rcx,8)",}, {{0x0f, 0xc7, 0x20, }, 3, 0, "", "", "0f c7 20 \txsavec (%rax)",}, {{0x41, 0x0f, 0xc7, 0x20, }, 4, 0, "", "", @@ -1727,3 +1737,55 @@ "f3 48 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%rax,%rcx,8)",}, {{0xf3, 0x49, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", "f3 49 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%r8,%rcx,8)",}, +{{0x66, 0x0f, 0xae, 0xf3, }, 4, 0, "", "", +"66 0f ae f3 \ttpause %ebx",}, +{{0x66, 0x41, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"66 41 0f ae f0 \ttpause %r8d",}, +{{0x67, 0xf3, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"67 f3 0f ae f0 \tumonitor %eax",}, +{{0xf3, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f3 0f ae f0 \tumonitor %rax",}, +{{0x67, 0xf3, 0x41, 0x0f, 0xae, 0xf0, }, 6, 0, "", "", +"67 f3 41 0f ae f0 \tumonitor %r8d",}, +{{0xf2, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f2 0f ae f0 \tumwait %eax",}, +{{0xf2, 0x41, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"f2 41 0f ae f0 \tumwait %r8d",}, +{{0x48, 0x0f, 0x38, 0xf9, 0x03, }, 5, 0, "", "", +"48 0f 38 f9 03 \tmovdiri %rax,(%rbx)",}, +{{0x48, 0x0f, 0x38, 0xf9, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"48 0f 38 f9 88 78 56 34 12 \tmovdiri %rcx,0x12345678(%rax)",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"66 0f 38 f8 18 \tmovdir64b (%rax),%rbx",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%rax),%rcx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "", +"67 66 0f 38 f8 18 \tmovdir64b (%eax),%ebx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", +"67 66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%eax),%ecx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f2 0f 38 f8 18 \tenqcmd (%rax),%rbx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%rax),%rcx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "", +"67 f2 0f 38 f8 18 \tenqcmd (%eax),%ebx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", +"67 f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%eax),%ecx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f3 0f 38 f8 18 \tenqcmds (%rax),%rbx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%rax),%rcx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "", +"67 f3 0f 38 f8 18 \tenqcmds (%eax),%ebx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", +"67 f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",}, +{{0x0f, 0x01, 0xcf, }, 3, 0, "", "", +"0f 01 cf \tencls ",}, +{{0x0f, 0x01, 0xd7, }, 3, 0, "", "", +"0f 01 d7 \tenclu ",}, +{{0x0f, 0x01, 0xc0, }, 3, 0, "", "", +"0f 01 c0 \tenclv ",}, +{{0x0f, 0x01, 0xc5, }, 3, 0, "", "", +"0f 01 c5 \tpconfig ",}, +{{0xf3, 0x0f, 0x09, }, 3, 0, "", "", +"f3 0f 09 \twbnoinvd ",}, diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-src.c b/tools/perf/arch/x86/tests/insn-x86-dat-src.c index 891415b10984..dd85a3afd9ce 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-src.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-src.c @@ -1320,6 +1320,14 @@ int main(void) asm volatile("xsaveopt (%r8)"); asm volatile("mfence"); + /* cldemote m8 */ + + asm volatile("cldemote (%rax)"); + asm volatile("cldemote (%r8)"); + asm volatile("cldemote (0x12345678)"); + asm volatile("cldemote 0x12345678(%rax,%rcx,8)"); + asm volatile("cldemote 0x12345678(%r8,%rcx,8)"); + /* xsavec mem */ asm volatile("xsavec (%rax)"); @@ -1364,6 +1372,48 @@ int main(void) asm volatile("ptwriteq 0x12345678(%rax,%rcx,8)"); asm volatile("ptwriteq 0x12345678(%r8,%rcx,8)"); + /* tpause */ + + asm volatile("tpause %ebx"); + asm volatile("tpause %r8d"); + + /* umonitor */ + + asm volatile("umonitor %eax"); + asm volatile("umonitor %rax"); + asm volatile("umonitor %r8d"); + + /* umwait */ + + asm volatile("umwait %eax"); + asm volatile("umwait %r8d"); + + /* movdiri */ + + asm volatile("movdiri %rax,(%rbx)"); + asm volatile("movdiri %rcx,0x12345678(%rax)"); + + /* movdir64b */ + + asm volatile("movdir64b (%rax),%rbx"); + asm volatile("movdir64b 0x12345678(%rax),%rcx"); + asm volatile("movdir64b (%eax),%ebx"); + asm volatile("movdir64b 0x12345678(%eax),%ecx"); + + /* enqcmd */ + + asm volatile("enqcmd (%rax),%rbx"); + asm volatile("enqcmd 0x12345678(%rax),%rcx"); + asm volatile("enqcmd (%eax),%ebx"); + asm volatile("enqcmd 0x12345678(%eax),%ecx"); + + /* enqcmds */ + + asm volatile("enqcmds (%rax),%rbx"); + asm volatile("enqcmds 0x12345678(%rax),%rcx"); + asm volatile("enqcmds (%eax),%ebx"); + asm volatile("enqcmds 0x12345678(%eax),%ecx"); + #else /* #ifdef __x86_64__ */ /* bound r32, mem (same op code as EVEX prefix) */ @@ -2656,6 +2706,12 @@ int main(void) asm volatile("xsaveopt (%eax)"); asm volatile("mfence"); + /* cldemote m8 */ + + asm volatile("cldemote (%eax)"); + asm volatile("cldemote (0x12345678)"); + asm volatile("cldemote 0x12345678(%eax,%ecx,8)"); + /* xsavec mem */ asm volatile("xsavec (%eax)"); @@ -2684,8 +2740,61 @@ int main(void) asm volatile("ptwritel (0x12345678)"); asm volatile("ptwritel 0x12345678(%eax,%ecx,8)"); + /* tpause */ + + asm volatile("tpause %ebx"); + + /* umonitor */ + + asm volatile("umonitor %ax"); + asm volatile("umonitor %eax"); + + /* umwait */ + + asm volatile("umwait %eax"); + + /* movdiri */ + + asm volatile("movdiri %eax,(%ebx)"); + asm volatile("movdiri %ecx,0x12345678(%eax)"); + + /* movdir64b */ + + asm volatile("movdir64b (%eax),%ebx"); + asm volatile("movdir64b 0x12345678(%eax),%ecx"); + asm volatile("movdir64b (%si),%bx"); + asm volatile("movdir64b 0x1234(%si),%cx"); + + /* enqcmd */ + + asm volatile("enqcmd (%eax),%ebx"); + asm volatile("enqcmd 0x12345678(%eax),%ecx"); + asm volatile("enqcmd (%si),%bx"); + asm volatile("enqcmd 0x1234(%si),%cx"); + + /* enqcmds */ + + asm volatile("enqcmds (%eax),%ebx"); + asm volatile("enqcmds 0x12345678(%eax),%ecx"); + asm volatile("enqcmds (%si),%bx"); + asm volatile("enqcmds 0x1234(%si),%cx"); + #endif /* #ifndef __x86_64__ */ + /* SGX */ + + asm volatile("encls"); + asm volatile("enclu"); + asm volatile("enclv"); + + /* pconfig */ + + asm volatile("pconfig"); + + /* wbnoinvd */ + + asm volatile("wbnoinvd"); + /* Following line is a marker for the awk script - do not change */ asm volatile("rdtsc"); /* Stop here */ -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [tip: perf/core] x86/insn: perf tools: Add some instructions to the new instructions test 2019-11-15 13:54 ` [PATCH 1/2] x86/insn: perf tools: Add some instructions to the new instructions test Adrian Hunter @ 2019-11-19 16:56 ` tip-bot2 for Adrian Hunter 0 siblings, 0 replies; 7+ messages in thread From: tip-bot2 for Adrian Hunter @ 2019-11-19 16:56 UTC (permalink / raw) To: linux-tip-commits Cc: Adrian Hunter, Andi Kleen, Borislav Petkov, H. Peter Anvin, Jiri Olsa, Masami Hiramatsu, Peter Zijlstra, Thomas Gleixner, x86, Arnaldo Carvalho de Melo, Ingo Molnar, linux-kernel The following commit has been merged into the perf/core branch of tip: Commit-ID: 1e5f015442e7b700941f8cd0274bb14962b3d78e Gitweb: https://git.kernel.org/tip/1e5f015442e7b700941f8cd0274bb14962b3d78e Author: Adrian Hunter <adrian.hunter@intel.com> AuthorDate: Fri, 15 Nov 2019 15:54:46 +02:00 Committer: Arnaldo Carvalho de Melo <acme@redhat.com> CommitterDate: Mon, 18 Nov 2019 18:53:54 -03:00 x86/insn: perf tools: Add some instructions to the new instructions test Add to the "x86 instruction decoder - new instructions" test the following instructions: cldemote tpause umonitor umwait movdiri movdir64b enqcmd enqcmds encls enclu enclv pconfig wbnoinvd For information about the instructions, refer Intel SDM May 2019 (325462-070US) and Intel Architecture Instruction Set Extensions May 2019 (319433-037). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86@kernel.org Link: http://lore.kernel.org/lkml/20191115135447.6519-2-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> --- tools/perf/arch/x86/tests/insn-x86-dat-32.c | 52 +++++++++- tools/perf/arch/x86/tests/insn-x86-dat-64.c | 62 ++++++++++- tools/perf/arch/x86/tests/insn-x86-dat-src.c | 109 ++++++++++++++++++- 3 files changed, 223 insertions(+) diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-32.c b/tools/perf/arch/x86/tests/insn-x86-dat-32.c index fab3c6d..58f8f2a 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-32.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-32.c @@ -1647,6 +1647,12 @@ "0f ae 30 \txsaveopt (%eax)",}, {{0x0f, 0xae, 0xf0, }, 3, 0, "", "", "0f ae f0 \tmfence ",}, +{{0x0f, 0x1c, 0x00, }, 3, 0, "", "", +"0f 1c 00 \tcldemote (%eax)",}, +{{0x0f, 0x1c, 0x05, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", +"0f 1c 05 78 56 34 12 \tcldemote 0x12345678",}, +{{0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%eax,%ecx,8)",}, {{0x0f, 0xc7, 0x20, }, 3, 0, "", "", "0f c7 20 \txsavec (%eax)",}, {{0x0f, 0xc7, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", @@ -1677,3 +1683,49 @@ "f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",}, {{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", "f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",}, +{{0x66, 0x0f, 0xae, 0xf3, }, 4, 0, "", "", +"66 0f ae f3 \ttpause %ebx",}, +{{0x67, 0xf3, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"67 f3 0f ae f0 \tumonitor %ax",}, +{{0xf3, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f3 0f ae f0 \tumonitor %eax",}, +{{0xf2, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f2 0f ae f0 \tumwait %eax",}, +{{0x0f, 0x38, 0xf9, 0x03, }, 4, 0, "", "", +"0f 38 f9 03 \tmovdiri %eax,(%ebx)",}, +{{0x0f, 0x38, 0xf9, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 38 f9 88 78 56 34 12 \tmovdiri %ecx,0x12345678(%eax)",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"66 0f 38 f8 18 \tmovdir64b (%eax),%ebx",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%eax),%ecx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "", +"67 66 0f 38 f8 1c \tmovdir64b (%si),%bx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "", +"67 66 0f 38 f8 8c 34 12 \tmovdir64b 0x1234(%si),%cx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f2 0f 38 f8 18 \tenqcmd (%eax),%ebx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%eax),%ecx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "", +"67 f2 0f 38 f8 1c \tenqcmd (%si),%bx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "", +"67 f2 0f 38 f8 8c 34 12 \tenqcmd 0x1234(%si),%cx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f3 0f 38 f8 18 \tenqcmds (%eax),%ebx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "", +"67 f3 0f 38 f8 1c \tenqcmds (%si),%bx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "", +"67 f3 0f 38 f8 8c 34 12 \tenqcmds 0x1234(%si),%cx",}, +{{0x0f, 0x01, 0xcf, }, 3, 0, "", "", +"0f 01 cf \tencls ",}, +{{0x0f, 0x01, 0xd7, }, 3, 0, "", "", +"0f 01 d7 \tenclu ",}, +{{0x0f, 0x01, 0xc0, }, 3, 0, "", "", +"0f 01 c0 \tenclv ",}, +{{0x0f, 0x01, 0xc5, }, 3, 0, "", "", +"0f 01 c5 \tpconfig ",}, +{{0xf3, 0x0f, 0x09, }, 3, 0, "", "", +"f3 0f 09 \twbnoinvd ",}, diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-64.c b/tools/perf/arch/x86/tests/insn-x86-dat-64.c index c57f346..656f8ae 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-64.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-64.c @@ -1667,6 +1667,16 @@ "41 0f ae 30 \txsaveopt (%r8)",}, {{0x0f, 0xae, 0xf0, }, 3, 0, "", "", "0f ae f0 \tmfence ",}, +{{0x0f, 0x1c, 0x00, }, 3, 0, "", "", +"0f 1c 00 \tcldemote (%rax)",}, +{{0x41, 0x0f, 0x1c, 0x00, }, 4, 0, "", "", +"41 0f 1c 00 \tcldemote (%r8)",}, +{{0x0f, 0x1c, 0x04, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 1c 04 25 78 56 34 12 \tcldemote 0x12345678",}, +{{0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%rax,%rcx,8)",}, +{{0x41, 0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"41 0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%r8,%rcx,8)",}, {{0x0f, 0xc7, 0x20, }, 3, 0, "", "", "0f c7 20 \txsavec (%rax)",}, {{0x41, 0x0f, 0xc7, 0x20, }, 4, 0, "", "", @@ -1727,3 +1737,55 @@ "f3 48 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%rax,%rcx,8)",}, {{0xf3, 0x49, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", "f3 49 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%r8,%rcx,8)",}, +{{0x66, 0x0f, 0xae, 0xf3, }, 4, 0, "", "", +"66 0f ae f3 \ttpause %ebx",}, +{{0x66, 0x41, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"66 41 0f ae f0 \ttpause %r8d",}, +{{0x67, 0xf3, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"67 f3 0f ae f0 \tumonitor %eax",}, +{{0xf3, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f3 0f ae f0 \tumonitor %rax",}, +{{0x67, 0xf3, 0x41, 0x0f, 0xae, 0xf0, }, 6, 0, "", "", +"67 f3 41 0f ae f0 \tumonitor %r8d",}, +{{0xf2, 0x0f, 0xae, 0xf0, }, 4, 0, "", "", +"f2 0f ae f0 \tumwait %eax",}, +{{0xf2, 0x41, 0x0f, 0xae, 0xf0, }, 5, 0, "", "", +"f2 41 0f ae f0 \tumwait %r8d",}, +{{0x48, 0x0f, 0x38, 0xf9, 0x03, }, 5, 0, "", "", +"48 0f 38 f9 03 \tmovdiri %rax,(%rbx)",}, +{{0x48, 0x0f, 0x38, 0xf9, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"48 0f 38 f9 88 78 56 34 12 \tmovdiri %rcx,0x12345678(%rax)",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"66 0f 38 f8 18 \tmovdir64b (%rax),%rbx",}, +{{0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%rax),%rcx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "", +"67 66 0f 38 f8 18 \tmovdir64b (%eax),%ebx",}, +{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", +"67 66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%eax),%ecx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f2 0f 38 f8 18 \tenqcmd (%rax),%rbx",}, +{{0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%rax),%rcx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "", +"67 f2 0f 38 f8 18 \tenqcmd (%eax),%ebx",}, +{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", +"67 f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%eax),%ecx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "", +"f3 0f 38 f8 18 \tenqcmds (%rax),%rbx",}, +{{0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", +"f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%rax),%rcx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "", +"67 f3 0f 38 f8 18 \tenqcmds (%eax),%ebx",}, +{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", +"67 f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",}, +{{0x0f, 0x01, 0xcf, }, 3, 0, "", "", +"0f 01 cf \tencls ",}, +{{0x0f, 0x01, 0xd7, }, 3, 0, "", "", +"0f 01 d7 \tenclu ",}, +{{0x0f, 0x01, 0xc0, }, 3, 0, "", "", +"0f 01 c0 \tenclv ",}, +{{0x0f, 0x01, 0xc5, }, 3, 0, "", "", +"0f 01 c5 \tpconfig ",}, +{{0xf3, 0x0f, 0x09, }, 3, 0, "", "", +"f3 0f 09 \twbnoinvd ",}, diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-src.c b/tools/perf/arch/x86/tests/insn-x86-dat-src.c index 891415b..dd85a3a 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-src.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-src.c @@ -1320,6 +1320,14 @@ int main(void) asm volatile("xsaveopt (%r8)"); asm volatile("mfence"); + /* cldemote m8 */ + + asm volatile("cldemote (%rax)"); + asm volatile("cldemote (%r8)"); + asm volatile("cldemote (0x12345678)"); + asm volatile("cldemote 0x12345678(%rax,%rcx,8)"); + asm volatile("cldemote 0x12345678(%r8,%rcx,8)"); + /* xsavec mem */ asm volatile("xsavec (%rax)"); @@ -1364,6 +1372,48 @@ int main(void) asm volatile("ptwriteq 0x12345678(%rax,%rcx,8)"); asm volatile("ptwriteq 0x12345678(%r8,%rcx,8)"); + /* tpause */ + + asm volatile("tpause %ebx"); + asm volatile("tpause %r8d"); + + /* umonitor */ + + asm volatile("umonitor %eax"); + asm volatile("umonitor %rax"); + asm volatile("umonitor %r8d"); + + /* umwait */ + + asm volatile("umwait %eax"); + asm volatile("umwait %r8d"); + + /* movdiri */ + + asm volatile("movdiri %rax,(%rbx)"); + asm volatile("movdiri %rcx,0x12345678(%rax)"); + + /* movdir64b */ + + asm volatile("movdir64b (%rax),%rbx"); + asm volatile("movdir64b 0x12345678(%rax),%rcx"); + asm volatile("movdir64b (%eax),%ebx"); + asm volatile("movdir64b 0x12345678(%eax),%ecx"); + + /* enqcmd */ + + asm volatile("enqcmd (%rax),%rbx"); + asm volatile("enqcmd 0x12345678(%rax),%rcx"); + asm volatile("enqcmd (%eax),%ebx"); + asm volatile("enqcmd 0x12345678(%eax),%ecx"); + + /* enqcmds */ + + asm volatile("enqcmds (%rax),%rbx"); + asm volatile("enqcmds 0x12345678(%rax),%rcx"); + asm volatile("enqcmds (%eax),%ebx"); + asm volatile("enqcmds 0x12345678(%eax),%ecx"); + #else /* #ifdef __x86_64__ */ /* bound r32, mem (same op code as EVEX prefix) */ @@ -2656,6 +2706,12 @@ int main(void) asm volatile("xsaveopt (%eax)"); asm volatile("mfence"); + /* cldemote m8 */ + + asm volatile("cldemote (%eax)"); + asm volatile("cldemote (0x12345678)"); + asm volatile("cldemote 0x12345678(%eax,%ecx,8)"); + /* xsavec mem */ asm volatile("xsavec (%eax)"); @@ -2684,8 +2740,61 @@ int main(void) asm volatile("ptwritel (0x12345678)"); asm volatile("ptwritel 0x12345678(%eax,%ecx,8)"); + /* tpause */ + + asm volatile("tpause %ebx"); + + /* umonitor */ + + asm volatile("umonitor %ax"); + asm volatile("umonitor %eax"); + + /* umwait */ + + asm volatile("umwait %eax"); + + /* movdiri */ + + asm volatile("movdiri %eax,(%ebx)"); + asm volatile("movdiri %ecx,0x12345678(%eax)"); + + /* movdir64b */ + + asm volatile("movdir64b (%eax),%ebx"); + asm volatile("movdir64b 0x12345678(%eax),%ecx"); + asm volatile("movdir64b (%si),%bx"); + asm volatile("movdir64b 0x1234(%si),%cx"); + + /* enqcmd */ + + asm volatile("enqcmd (%eax),%ebx"); + asm volatile("enqcmd 0x12345678(%eax),%ecx"); + asm volatile("enqcmd (%si),%bx"); + asm volatile("enqcmd 0x1234(%si),%cx"); + + /* enqcmds */ + + asm volatile("enqcmds (%eax),%ebx"); + asm volatile("enqcmds 0x12345678(%eax),%ecx"); + asm volatile("enqcmds (%si),%bx"); + asm volatile("enqcmds 0x1234(%si),%cx"); + #endif /* #ifndef __x86_64__ */ + /* SGX */ + + asm volatile("encls"); + asm volatile("enclu"); + asm volatile("enclv"); + + /* pconfig */ + + asm volatile("pconfig"); + + /* wbnoinvd */ + + asm volatile("wbnoinvd"); + /* Following line is a marker for the awk script - do not change */ asm volatile("rdtsc"); /* Stop here */ ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map 2019-11-15 13:54 [PATCH 0/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter 2019-11-15 13:54 ` [PATCH 1/2] x86/insn: perf tools: Add some instructions to the new instructions test Adrian Hunter @ 2019-11-15 13:54 ` Adrian Hunter 2019-11-18 11:40 ` Masami Hiramatsu 2019-11-19 16:56 ` [tip: perf/core] " tip-bot2 for Adrian Hunter 1 sibling, 2 replies; 7+ messages in thread From: Adrian Hunter @ 2019-11-15 13:54 UTC (permalink / raw) To: x86 Cc: Arnaldo Carvalho de Melo, Jiri Olsa, linux-kernel, Thomas Gleixner, Ingo Molnar, Borislav Petkov, H Peter Anvin, Andi Kleen, Peter Zijlstra, Masami Hiramatsu Add to the opcode map the following instructions: cldemote tpause umonitor umwait movdiri movdir64b enqcmd enqcmds encls enclu enclv pconfig wbnoinvd For information about the instructions, refer Intel SDM May 2019 (325462-070US) and Intel Architecture Instruction Set Extensions May 2019 (319433-037). The instruction decoding can be tested using the perf tools' "x86 instruction decoder - new instructions" test as folllows: $ perf test -v "new " 2>&1 | grep -i cldemote Decoded ok: 0f 1c 00 cldemote (%eax) Decoded ok: 0f 1c 05 78 56 34 12 cldemote 0x12345678 Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%eax,%ecx,8) Decoded ok: 0f 1c 00 cldemote (%rax) Decoded ok: 41 0f 1c 00 cldemote (%r8) Decoded ok: 0f 1c 04 25 78 56 34 12 cldemote 0x12345678 Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%rax,%rcx,8) Decoded ok: 41 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%r8,%rcx,8) $ perf test -v "new " 2>&1 | grep -i tpause Decoded ok: 66 0f ae f3 tpause %ebx Decoded ok: 66 0f ae f3 tpause %ebx Decoded ok: 66 41 0f ae f0 tpause %r8d $ perf test -v "new " 2>&1 | grep -i umonitor Decoded ok: 67 f3 0f ae f0 umonitor %ax Decoded ok: f3 0f ae f0 umonitor %eax Decoded ok: 67 f3 0f ae f0 umonitor %eax Decoded ok: f3 0f ae f0 umonitor %rax Decoded ok: 67 f3 41 0f ae f0 umonitor %r8d $ perf test -v "new " 2>&1 | grep -i umwait Decoded ok: f2 0f ae f0 umwait %eax Decoded ok: f2 0f ae f0 umwait %eax Decoded ok: f2 41 0f ae f0 umwait %r8d $ perf test -v "new " 2>&1 | grep -i movdiri Decoded ok: 0f 38 f9 03 movdiri %eax,(%ebx) Decoded ok: 0f 38 f9 88 78 56 34 12 movdiri %ecx,0x12345678(%eax) Decoded ok: 48 0f 38 f9 03 movdiri %rax,(%rbx) Decoded ok: 48 0f 38 f9 88 78 56 34 12 movdiri %rcx,0x12345678(%rax) $ perf test -v "new " 2>&1 | grep -i movdir64b Decoded ok: 66 0f 38 f8 18 movdir64b (%eax),%ebx Decoded ok: 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%eax),%ecx Decoded ok: 67 66 0f 38 f8 1c movdir64b (%si),%bx Decoded ok: 67 66 0f 38 f8 8c 34 12 movdir64b 0x1234(%si),%cx Decoded ok: 66 0f 38 f8 18 movdir64b (%rax),%rbx Decoded ok: 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%rax),%rcx Decoded ok: 67 66 0f 38 f8 18 movdir64b (%eax),%ebx Decoded ok: 67 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%eax),%ecx $ perf test -v "new " 2>&1 | grep -i enqcmd Decoded ok: f2 0f 38 f8 18 enqcmd (%eax),%ebx Decoded ok: f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%eax),%ecx Decoded ok: 67 f2 0f 38 f8 1c enqcmd (%si),%bx Decoded ok: 67 f2 0f 38 f8 8c 34 12 enqcmd 0x1234(%si),%cx Decoded ok: f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx Decoded ok: 67 f3 0f 38 f8 1c enqcmds (%si),%bx Decoded ok: 67 f3 0f 38 f8 8c 34 12 enqcmds 0x1234(%si),%cx Decoded ok: f2 0f 38 f8 18 enqcmd (%rax),%rbx Decoded ok: f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%rax),%rcx Decoded ok: 67 f2 0f 38 f8 18 enqcmd (%eax),%ebx Decoded ok: 67 f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%eax),%ecx Decoded ok: f3 0f 38 f8 18 enqcmds (%rax),%rbx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%rax),%rcx Decoded ok: 67 f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: 67 f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx $ perf test -v "new " 2>&1 | grep -i enqcmds Decoded ok: f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx Decoded ok: 67 f3 0f 38 f8 1c enqcmds (%si),%bx Decoded ok: 67 f3 0f 38 f8 8c 34 12 enqcmds 0x1234(%si),%cx Decoded ok: f3 0f 38 f8 18 enqcmds (%rax),%rbx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%rax),%rcx Decoded ok: 67 f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: 67 f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx $ perf test -v "new " 2>&1 | grep -i encls Decoded ok: 0f 01 cf encls Decoded ok: 0f 01 cf encls $ perf test -v "new " 2>&1 | grep -i enclu Decoded ok: 0f 01 d7 enclu Decoded ok: 0f 01 d7 enclu $ perf test -v "new " 2>&1 | grep -i enclv Decoded ok: 0f 01 c0 enclv Decoded ok: 0f 01 c0 enclv $ perf test -v "new " 2>&1 | grep -i pconfig Decoded ok: 0f 01 c5 pconfig Decoded ok: 0f 01 c5 pconfig $ perf test -v "new " 2>&1 | grep -i wbnoinvd Decoded ok: f3 0f 09 wbnoinvd Decoded ok: f3 0f 09 wbnoinvd Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> --- arch/x86/lib/x86-opcode-map.txt | 18 ++++++++++++------ tools/arch/x86/lib/x86-opcode-map.txt | 18 ++++++++++++------ 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt index e0b85930dd77..0a0e9112f284 100644 --- a/arch/x86/lib/x86-opcode-map.txt +++ b/arch/x86/lib/x86-opcode-map.txt @@ -333,7 +333,7 @@ AVXcode: 1 06: CLTS 07: SYSRET (o64) 08: INVD -09: WBINVD +09: WBINVD | WBNOINVD (F3) 0a: 0b: UD2 (1B) 0c: @@ -364,7 +364,7 @@ AVXcode: 1 # a ModR/M byte. 1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv -1c: +1c: Grp20 (1A),(1C) 1d: 1e: 1f: NOP Ev @@ -792,6 +792,8 @@ f3: Grp17 (1A) f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) +f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) +f9: MOVDIRI My,Gy EndTable Table: 3-byte opcode 2 (0x0f 0x3a) @@ -943,9 +945,9 @@ GrpTable: Grp6 EndTable GrpTable: Grp7 -0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) -1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) -2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) +0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) +1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) +2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) 3: LIDT Ms 4: SMSW Mw/Rv 5: rdpkru (110),(11B) | wrpkru (111),(11B) @@ -1020,7 +1022,7 @@ GrpTable: Grp15 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) 4: XSAVE | ptwrite Ey (F3),(11B) 5: XRSTOR | lfence (11B) -6: XSAVEOPT | clwb (66) | mfence (11B) +6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) 7: clflush | clflushopt (66) | sfence (11B) EndTable @@ -1051,6 +1053,10 @@ GrpTable: Grp19 6: vscatterpf1qps/d Wx (66),(ev) EndTable +GrpTable: Grp20 +0: cldemote Mb +EndTable + # AMD's Prefetch Group GrpTable: GrpP 0: PREFETCH diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt index e0b85930dd77..0a0e9112f284 100644 --- a/tools/arch/x86/lib/x86-opcode-map.txt +++ b/tools/arch/x86/lib/x86-opcode-map.txt @@ -333,7 +333,7 @@ AVXcode: 1 06: CLTS 07: SYSRET (o64) 08: INVD -09: WBINVD +09: WBINVD | WBNOINVD (F3) 0a: 0b: UD2 (1B) 0c: @@ -364,7 +364,7 @@ AVXcode: 1 # a ModR/M byte. 1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv -1c: +1c: Grp20 (1A),(1C) 1d: 1e: 1f: NOP Ev @@ -792,6 +792,8 @@ f3: Grp17 (1A) f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) +f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) +f9: MOVDIRI My,Gy EndTable Table: 3-byte opcode 2 (0x0f 0x3a) @@ -943,9 +945,9 @@ GrpTable: Grp6 EndTable GrpTable: Grp7 -0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) -1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) -2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) +0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) +1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) +2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) 3: LIDT Ms 4: SMSW Mw/Rv 5: rdpkru (110),(11B) | wrpkru (111),(11B) @@ -1020,7 +1022,7 @@ GrpTable: Grp15 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) 4: XSAVE | ptwrite Ey (F3),(11B) 5: XRSTOR | lfence (11B) -6: XSAVEOPT | clwb (66) | mfence (11B) +6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) 7: clflush | clflushopt (66) | sfence (11B) EndTable @@ -1051,6 +1053,10 @@ GrpTable: Grp19 6: vscatterpf1qps/d Wx (66),(ev) EndTable +GrpTable: Grp20 +0: cldemote Mb +EndTable + # AMD's Prefetch Group GrpTable: GrpP 0: PREFETCH -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map 2019-11-15 13:54 ` [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter @ 2019-11-18 11:40 ` Masami Hiramatsu 2019-11-18 21:55 ` Arnaldo Carvalho de Melo 2019-11-19 16:56 ` [tip: perf/core] " tip-bot2 for Adrian Hunter 1 sibling, 1 reply; 7+ messages in thread From: Masami Hiramatsu @ 2019-11-18 11:40 UTC (permalink / raw) To: Adrian Hunter Cc: x86, Arnaldo Carvalho de Melo, Jiri Olsa, linux-kernel, Thomas Gleixner, Ingo Molnar, Borislav Petkov, H Peter Anvin, Andi Kleen, Peter Zijlstra, Masami Hiramatsu Hi Adrian, On Fri, 15 Nov 2019 15:54:47 +0200 Adrian Hunter <adrian.hunter@intel.com> wrote: > Add to the opcode map the following instructions: > cldemote > tpause > umonitor > umwait > movdiri > movdir64b > enqcmd > enqcmds > encls > enclu > enclv > pconfig > wbnoinvd > > For information about the instructions, refer Intel SDM May 2019 > (325462-070US) and Intel Architecture Instruction Set Extensions > May 2019 (319433-037). > > The instruction decoding can be tested using the perf tools' > "x86 instruction decoder - new instructions" test as folllows: > > $ perf test -v "new " 2>&1 | grep -i cldemote > Decoded ok: 0f 1c 00 cldemote (%eax) > Decoded ok: 0f 1c 05 78 56 34 12 cldemote 0x12345678 > Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%eax,%ecx,8) > Decoded ok: 0f 1c 00 cldemote (%rax) > Decoded ok: 41 0f 1c 00 cldemote (%r8) > Decoded ok: 0f 1c 04 25 78 56 34 12 cldemote 0x12345678 > Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%rax,%rcx,8) > Decoded ok: 41 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%r8,%rcx,8) > $ perf test -v "new " 2>&1 | grep -i tpause > Decoded ok: 66 0f ae f3 tpause %ebx > Decoded ok: 66 0f ae f3 tpause %ebx > Decoded ok: 66 41 0f ae f0 tpause %r8d > $ perf test -v "new " 2>&1 | grep -i umonitor > Decoded ok: 67 f3 0f ae f0 umonitor %ax > Decoded ok: f3 0f ae f0 umonitor %eax > Decoded ok: 67 f3 0f ae f0 umonitor %eax > Decoded ok: f3 0f ae f0 umonitor %rax > Decoded ok: 67 f3 41 0f ae f0 umonitor %r8d > $ perf test -v "new " 2>&1 | grep -i umwait > Decoded ok: f2 0f ae f0 umwait %eax > Decoded ok: f2 0f ae f0 umwait %eax > Decoded ok: f2 41 0f ae f0 umwait %r8d > $ perf test -v "new " 2>&1 | grep -i movdiri > Decoded ok: 0f 38 f9 03 movdiri %eax,(%ebx) > Decoded ok: 0f 38 f9 88 78 56 34 12 movdiri %ecx,0x12345678(%eax) > Decoded ok: 48 0f 38 f9 03 movdiri %rax,(%rbx) > Decoded ok: 48 0f 38 f9 88 78 56 34 12 movdiri %rcx,0x12345678(%rax) > $ perf test -v "new " 2>&1 | grep -i movdir64b > Decoded ok: 66 0f 38 f8 18 movdir64b (%eax),%ebx > Decoded ok: 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%eax),%ecx > Decoded ok: 67 66 0f 38 f8 1c movdir64b (%si),%bx > Decoded ok: 67 66 0f 38 f8 8c 34 12 movdir64b 0x1234(%si),%cx > Decoded ok: 66 0f 38 f8 18 movdir64b (%rax),%rbx > Decoded ok: 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%rax),%rcx > Decoded ok: 67 66 0f 38 f8 18 movdir64b (%eax),%ebx > Decoded ok: 67 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%eax),%ecx > $ perf test -v "new " 2>&1 | grep -i enqcmd > Decoded ok: f2 0f 38 f8 18 enqcmd (%eax),%ebx > Decoded ok: f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%eax),%ecx > Decoded ok: 67 f2 0f 38 f8 1c enqcmd (%si),%bx > Decoded ok: 67 f2 0f 38 f8 8c 34 12 enqcmd 0x1234(%si),%cx > Decoded ok: f3 0f 38 f8 18 enqcmds (%eax),%ebx > Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx > Decoded ok: 67 f3 0f 38 f8 1c enqcmds (%si),%bx > Decoded ok: 67 f3 0f 38 f8 8c 34 12 enqcmds 0x1234(%si),%cx > Decoded ok: f2 0f 38 f8 18 enqcmd (%rax),%rbx > Decoded ok: f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%rax),%rcx > Decoded ok: 67 f2 0f 38 f8 18 enqcmd (%eax),%ebx > Decoded ok: 67 f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%eax),%ecx > Decoded ok: f3 0f 38 f8 18 enqcmds (%rax),%rbx > Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%rax),%rcx > Decoded ok: 67 f3 0f 38 f8 18 enqcmds (%eax),%ebx > Decoded ok: 67 f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx > $ perf test -v "new " 2>&1 | grep -i enqcmds > Decoded ok: f3 0f 38 f8 18 enqcmds (%eax),%ebx > Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx > Decoded ok: 67 f3 0f 38 f8 1c enqcmds (%si),%bx > Decoded ok: 67 f3 0f 38 f8 8c 34 12 enqcmds 0x1234(%si),%cx > Decoded ok: f3 0f 38 f8 18 enqcmds (%rax),%rbx > Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%rax),%rcx > Decoded ok: 67 f3 0f 38 f8 18 enqcmds (%eax),%ebx > Decoded ok: 67 f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx > $ perf test -v "new " 2>&1 | grep -i encls > Decoded ok: 0f 01 cf encls > Decoded ok: 0f 01 cf encls > $ perf test -v "new " 2>&1 | grep -i enclu > Decoded ok: 0f 01 d7 enclu > Decoded ok: 0f 01 d7 enclu > $ perf test -v "new " 2>&1 | grep -i enclv > Decoded ok: 0f 01 c0 enclv > Decoded ok: 0f 01 c0 enclv > $ perf test -v "new " 2>&1 | grep -i pconfig > Decoded ok: 0f 01 c5 pconfig > Decoded ok: 0f 01 c5 pconfig > $ perf test -v "new " 2>&1 | grep -i wbnoinvd > Decoded ok: f3 0f 09 wbnoinvd > Decoded ok: f3 0f 09 wbnoinvd > Thanks for updating it! This looks good to me. Acked-by: Masami Hiramatsu <mhiramat@kernel.org> > Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> > Reviewed-by: Andi Kleen <ak@linux.intel.com> > --- > arch/x86/lib/x86-opcode-map.txt | 18 ++++++++++++------ > tools/arch/x86/lib/x86-opcode-map.txt | 18 ++++++++++++------ > 2 files changed, 24 insertions(+), 12 deletions(-) > > diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt > index e0b85930dd77..0a0e9112f284 100644 > --- a/arch/x86/lib/x86-opcode-map.txt > +++ b/arch/x86/lib/x86-opcode-map.txt > @@ -333,7 +333,7 @@ AVXcode: 1 > 06: CLTS > 07: SYSRET (o64) > 08: INVD > -09: WBINVD > +09: WBINVD | WBNOINVD (F3) > 0a: > 0b: UD2 (1B) > 0c: > @@ -364,7 +364,7 @@ AVXcode: 1 > # a ModR/M byte. > 1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev > 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv > -1c: > +1c: Grp20 (1A),(1C) > 1d: > 1e: > 1f: NOP Ev > @@ -792,6 +792,8 @@ f3: Grp17 (1A) > f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) > f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) > f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) > +f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) > +f9: MOVDIRI My,Gy > EndTable > > Table: 3-byte opcode 2 (0x0f 0x3a) > @@ -943,9 +945,9 @@ GrpTable: Grp6 > EndTable > > GrpTable: Grp7 > -0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) > -1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) > -2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) > +0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) > +1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) > +2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) > 3: LIDT Ms > 4: SMSW Mw/Rv > 5: rdpkru (110),(11B) | wrpkru (111),(11B) > @@ -1020,7 +1022,7 @@ GrpTable: Grp15 > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > 4: XSAVE | ptwrite Ey (F3),(11B) > 5: XRSTOR | lfence (11B) > -6: XSAVEOPT | clwb (66) | mfence (11B) > +6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) > 7: clflush | clflushopt (66) | sfence (11B) > EndTable > > @@ -1051,6 +1053,10 @@ GrpTable: Grp19 > 6: vscatterpf1qps/d Wx (66),(ev) > EndTable > > +GrpTable: Grp20 > +0: cldemote Mb > +EndTable > + > # AMD's Prefetch Group > GrpTable: GrpP > 0: PREFETCH > diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt > index e0b85930dd77..0a0e9112f284 100644 > --- a/tools/arch/x86/lib/x86-opcode-map.txt > +++ b/tools/arch/x86/lib/x86-opcode-map.txt > @@ -333,7 +333,7 @@ AVXcode: 1 > 06: CLTS > 07: SYSRET (o64) > 08: INVD > -09: WBINVD > +09: WBINVD | WBNOINVD (F3) > 0a: > 0b: UD2 (1B) > 0c: > @@ -364,7 +364,7 @@ AVXcode: 1 > # a ModR/M byte. > 1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev > 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv > -1c: > +1c: Grp20 (1A),(1C) > 1d: > 1e: > 1f: NOP Ev > @@ -792,6 +792,8 @@ f3: Grp17 (1A) > f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) > f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) > f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) > +f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) > +f9: MOVDIRI My,Gy > EndTable > > Table: 3-byte opcode 2 (0x0f 0x3a) > @@ -943,9 +945,9 @@ GrpTable: Grp6 > EndTable > > GrpTable: Grp7 > -0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) > -1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) > -2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) > +0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) > +1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) > +2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) > 3: LIDT Ms > 4: SMSW Mw/Rv > 5: rdpkru (110),(11B) | wrpkru (111),(11B) > @@ -1020,7 +1022,7 @@ GrpTable: Grp15 > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > 4: XSAVE | ptwrite Ey (F3),(11B) > 5: XRSTOR | lfence (11B) > -6: XSAVEOPT | clwb (66) | mfence (11B) > +6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) > 7: clflush | clflushopt (66) | sfence (11B) > EndTable > > @@ -1051,6 +1053,10 @@ GrpTable: Grp19 > 6: vscatterpf1qps/d Wx (66),(ev) > EndTable > > +GrpTable: Grp20 > +0: cldemote Mb > +EndTable > + > # AMD's Prefetch Group > GrpTable: GrpP > 0: PREFETCH > -- > 2.17.1 > -- Masami Hiramatsu <mhiramat@kernel.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map 2019-11-18 11:40 ` Masami Hiramatsu @ 2019-11-18 21:55 ` Arnaldo Carvalho de Melo 0 siblings, 0 replies; 7+ messages in thread From: Arnaldo Carvalho de Melo @ 2019-11-18 21:55 UTC (permalink / raw) To: Masami Hiramatsu Cc: Adrian Hunter, x86, Jiri Olsa, linux-kernel, Thomas Gleixner, Ingo Molnar, Borislav Petkov, H Peter Anvin, Andi Kleen, Peter Zijlstra Em Mon, Nov 18, 2019 at 08:40:45PM +0900, Masami Hiramatsu escreveu: > Hi Adrian, > > On Fri, 15 Nov 2019 15:54:47 +0200 > Adrian Hunter <adrian.hunter@intel.com> wrote: > > > Thanks for updating it! > This looks good to me. > > Acked-by: Masami Hiramatsu <mhiramat@kernel.org> > > > Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> > > Reviewed-by: Andi Kleen <ak@linux.intel.com> Thanks, applied both patches, - Arnaldo ^ permalink raw reply [flat|nested] 7+ messages in thread
* [tip: perf/core] x86/insn: Add some Intel instructions to the opcode map 2019-11-15 13:54 ` [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter 2019-11-18 11:40 ` Masami Hiramatsu @ 2019-11-19 16:56 ` tip-bot2 for Adrian Hunter 1 sibling, 0 replies; 7+ messages in thread From: tip-bot2 for Adrian Hunter @ 2019-11-19 16:56 UTC (permalink / raw) To: linux-tip-commits Cc: Adrian Hunter, Andi Kleen, Masami Hiramatsu, Borislav Petkov, H. Peter Anvin, Jiri Olsa, Peter Zijlstra, Thomas Gleixner, x86, Arnaldo Carvalho de Melo, Ingo Molnar, linux-kernel The following commit has been merged into the perf/core branch of tip: Commit-ID: b980be189c9badba50634671e2303e92bf28e35a Gitweb: https://git.kernel.org/tip/b980be189c9badba50634671e2303e92bf28e35a Author: Adrian Hunter <adrian.hunter@intel.com> AuthorDate: Fri, 15 Nov 2019 15:54:47 +02:00 Committer: Arnaldo Carvalho de Melo <acme@redhat.com> CommitterDate: Mon, 18 Nov 2019 18:54:45 -03:00 x86/insn: Add some Intel instructions to the opcode map Add to the opcode map the following instructions: cldemote tpause umonitor umwait movdiri movdir64b enqcmd enqcmds encls enclu enclv pconfig wbnoinvd For information about the instructions, refer Intel SDM May 2019 (325462-070US) and Intel Architecture Instruction Set Extensions May 2019 (319433-037). The instruction decoding can be tested using the perf tools' "x86 instruction decoder - new instructions" test as folllows: $ perf test -v "new " 2>&1 | grep -i cldemote Decoded ok: 0f 1c 00 cldemote (%eax) Decoded ok: 0f 1c 05 78 56 34 12 cldemote 0x12345678 Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%eax,%ecx,8) Decoded ok: 0f 1c 00 cldemote (%rax) Decoded ok: 41 0f 1c 00 cldemote (%r8) Decoded ok: 0f 1c 04 25 78 56 34 12 cldemote 0x12345678 Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%rax,%rcx,8) Decoded ok: 41 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%r8,%rcx,8) $ perf test -v "new " 2>&1 | grep -i tpause Decoded ok: 66 0f ae f3 tpause %ebx Decoded ok: 66 0f ae f3 tpause %ebx Decoded ok: 66 41 0f ae f0 tpause %r8d $ perf test -v "new " 2>&1 | grep -i umonitor Decoded ok: 67 f3 0f ae f0 umonitor %ax Decoded ok: f3 0f ae f0 umonitor %eax Decoded ok: 67 f3 0f ae f0 umonitor %eax Decoded ok: f3 0f ae f0 umonitor %rax Decoded ok: 67 f3 41 0f ae f0 umonitor %r8d $ perf test -v "new " 2>&1 | grep -i umwait Decoded ok: f2 0f ae f0 umwait %eax Decoded ok: f2 0f ae f0 umwait %eax Decoded ok: f2 41 0f ae f0 umwait %r8d $ perf test -v "new " 2>&1 | grep -i movdiri Decoded ok: 0f 38 f9 03 movdiri %eax,(%ebx) Decoded ok: 0f 38 f9 88 78 56 34 12 movdiri %ecx,0x12345678(%eax) Decoded ok: 48 0f 38 f9 03 movdiri %rax,(%rbx) Decoded ok: 48 0f 38 f9 88 78 56 34 12 movdiri %rcx,0x12345678(%rax) $ perf test -v "new " 2>&1 | grep -i movdir64b Decoded ok: 66 0f 38 f8 18 movdir64b (%eax),%ebx Decoded ok: 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%eax),%ecx Decoded ok: 67 66 0f 38 f8 1c movdir64b (%si),%bx Decoded ok: 67 66 0f 38 f8 8c 34 12 movdir64b 0x1234(%si),%cx Decoded ok: 66 0f 38 f8 18 movdir64b (%rax),%rbx Decoded ok: 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%rax),%rcx Decoded ok: 67 66 0f 38 f8 18 movdir64b (%eax),%ebx Decoded ok: 67 66 0f 38 f8 88 78 56 34 12 movdir64b 0x12345678(%eax),%ecx $ perf test -v "new " 2>&1 | grep -i enqcmd Decoded ok: f2 0f 38 f8 18 enqcmd (%eax),%ebx Decoded ok: f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%eax),%ecx Decoded ok: 67 f2 0f 38 f8 1c enqcmd (%si),%bx Decoded ok: 67 f2 0f 38 f8 8c 34 12 enqcmd 0x1234(%si),%cx Decoded ok: f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx Decoded ok: 67 f3 0f 38 f8 1c enqcmds (%si),%bx Decoded ok: 67 f3 0f 38 f8 8c 34 12 enqcmds 0x1234(%si),%cx Decoded ok: f2 0f 38 f8 18 enqcmd (%rax),%rbx Decoded ok: f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%rax),%rcx Decoded ok: 67 f2 0f 38 f8 18 enqcmd (%eax),%ebx Decoded ok: 67 f2 0f 38 f8 88 78 56 34 12 enqcmd 0x12345678(%eax),%ecx Decoded ok: f3 0f 38 f8 18 enqcmds (%rax),%rbx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%rax),%rcx Decoded ok: 67 f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: 67 f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx $ perf test -v "new " 2>&1 | grep -i enqcmds Decoded ok: f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx Decoded ok: 67 f3 0f 38 f8 1c enqcmds (%si),%bx Decoded ok: 67 f3 0f 38 f8 8c 34 12 enqcmds 0x1234(%si),%cx Decoded ok: f3 0f 38 f8 18 enqcmds (%rax),%rbx Decoded ok: f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%rax),%rcx Decoded ok: 67 f3 0f 38 f8 18 enqcmds (%eax),%ebx Decoded ok: 67 f3 0f 38 f8 88 78 56 34 12 enqcmds 0x12345678(%eax),%ecx $ perf test -v "new " 2>&1 | grep -i encls Decoded ok: 0f 01 cf encls Decoded ok: 0f 01 cf encls $ perf test -v "new " 2>&1 | grep -i enclu Decoded ok: 0f 01 d7 enclu Decoded ok: 0f 01 d7 enclu $ perf test -v "new " 2>&1 | grep -i enclv Decoded ok: 0f 01 c0 enclv Decoded ok: 0f 01 c0 enclv $ perf test -v "new " 2>&1 | grep -i pconfig Decoded ok: 0f 01 c5 pconfig Decoded ok: 0f 01 c5 pconfig $ perf test -v "new " 2>&1 | grep -i wbnoinvd Decoded ok: f3 0f 09 wbnoinvd Decoded ok: f3 0f 09 wbnoinvd Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86@kernel.org Link: http://lore.kernel.org/lkml/20191115135447.6519-3-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> --- arch/x86/lib/x86-opcode-map.txt | 18 ++++++++++++------ tools/arch/x86/lib/x86-opcode-map.txt | 18 ++++++++++++------ 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt index e0b8593..0a0e911 100644 --- a/arch/x86/lib/x86-opcode-map.txt +++ b/arch/x86/lib/x86-opcode-map.txt @@ -333,7 +333,7 @@ AVXcode: 1 06: CLTS 07: SYSRET (o64) 08: INVD -09: WBINVD +09: WBINVD | WBNOINVD (F3) 0a: 0b: UD2 (1B) 0c: @@ -364,7 +364,7 @@ AVXcode: 1 # a ModR/M byte. 1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv -1c: +1c: Grp20 (1A),(1C) 1d: 1e: 1f: NOP Ev @@ -792,6 +792,8 @@ f3: Grp17 (1A) f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) +f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) +f9: MOVDIRI My,Gy EndTable Table: 3-byte opcode 2 (0x0f 0x3a) @@ -943,9 +945,9 @@ GrpTable: Grp6 EndTable GrpTable: Grp7 -0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) -1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) -2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) +0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) +1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) +2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) 3: LIDT Ms 4: SMSW Mw/Rv 5: rdpkru (110),(11B) | wrpkru (111),(11B) @@ -1020,7 +1022,7 @@ GrpTable: Grp15 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) 4: XSAVE | ptwrite Ey (F3),(11B) 5: XRSTOR | lfence (11B) -6: XSAVEOPT | clwb (66) | mfence (11B) +6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) 7: clflush | clflushopt (66) | sfence (11B) EndTable @@ -1051,6 +1053,10 @@ GrpTable: Grp19 6: vscatterpf1qps/d Wx (66),(ev) EndTable +GrpTable: Grp20 +0: cldemote Mb +EndTable + # AMD's Prefetch Group GrpTable: GrpP 0: PREFETCH diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt index e0b8593..0a0e911 100644 --- a/tools/arch/x86/lib/x86-opcode-map.txt +++ b/tools/arch/x86/lib/x86-opcode-map.txt @@ -333,7 +333,7 @@ AVXcode: 1 06: CLTS 07: SYSRET (o64) 08: INVD -09: WBINVD +09: WBINVD | WBNOINVD (F3) 0a: 0b: UD2 (1B) 0c: @@ -364,7 +364,7 @@ AVXcode: 1 # a ModR/M byte. 1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev 1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv -1c: +1c: Grp20 (1A),(1C) 1d: 1e: 1f: NOP Ev @@ -792,6 +792,8 @@ f3: Grp17 (1A) f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) +f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) +f9: MOVDIRI My,Gy EndTable Table: 3-byte opcode 2 (0x0f 0x3a) @@ -943,9 +945,9 @@ GrpTable: Grp6 EndTable GrpTable: Grp7 -0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) -1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) -2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) +0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B) +1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B) +2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B) 3: LIDT Ms 4: SMSW Mw/Rv 5: rdpkru (110),(11B) | wrpkru (111),(11B) @@ -1020,7 +1022,7 @@ GrpTable: Grp15 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) 4: XSAVE | ptwrite Ey (F3),(11B) 5: XRSTOR | lfence (11B) -6: XSAVEOPT | clwb (66) | mfence (11B) +6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) 7: clflush | clflushopt (66) | sfence (11B) EndTable @@ -1051,6 +1053,10 @@ GrpTable: Grp19 6: vscatterpf1qps/d Wx (66),(ev) EndTable +GrpTable: Grp20 +0: cldemote Mb +EndTable + # AMD's Prefetch Group GrpTable: GrpP 0: PREFETCH ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-11-19 16:57 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-11-15 13:54 [PATCH 0/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter 2019-11-15 13:54 ` [PATCH 1/2] x86/insn: perf tools: Add some instructions to the new instructions test Adrian Hunter 2019-11-19 16:56 ` [tip: perf/core] " tip-bot2 for Adrian Hunter 2019-11-15 13:54 ` [PATCH 2/2] x86/insn: Add some Intel instructions to the opcode map Adrian Hunter 2019-11-18 11:40 ` Masami Hiramatsu 2019-11-18 21:55 ` Arnaldo Carvalho de Melo 2019-11-19 16:56 ` [tip: perf/core] " tip-bot2 for Adrian Hunter
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