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From: Peter Zijlstra <peterz@infradead.org>
To: roman.sudarikov@linux.intel.com
Cc: mingo@redhat.com, acme@kernel.org, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, jolsa@redhat.com,
	namhyung@kernel.org, linux-kernel@vger.kernel.org,
	eranian@google.com, bgregg@netflix.com, ak@linux.intel.com,
	kan.liang@linux.intel.com, alexander.antonov@intel.com
Subject: Re: [PATCH 1/6] perf x86: Infrastructure for exposing an Uncore unit to PMON mapping
Date: Mon, 2 Dec 2019 15:00:59 +0100	[thread overview]
Message-ID: <20191202140059.GL2844@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20191126163630.17300-2-roman.sudarikov@linux.intel.com>

On Tue, Nov 26, 2019 at 07:36:25PM +0300, roman.sudarikov@linux.intel.com wrote:
> From: Roman Sudarikov <roman.sudarikov@linux.intel.com>
> 
> Intel® Xeon® Scalable processor family (code name Skylake-SP) makes significant
> changes in the integrated I/O (IIO) architecture. The new solution introduces
> IIO stacks which are responsible for managing traffic between the PCIe domain
> and the Mesh domain. Each IIO stack has its own PMON block and can handle either
> DMI port, x16 PCIe root port, MCP-Link or various built-in accelerators.
> IIO PMON blocks allow concurrent monitoring of I/O flows up to 4 x4 bifurcation
> within each IIO stack.
> 
> Software is supposed to program required perf counters within each IIO stack
> and gather performance data. The tricky thing here is that IIO PMON reports data
> per IIO stack but users have no idea what IIO stacks are - they only know devices
> which are connected to the platform.
> 
> Understanding IIO stack concept to find which IIO stack that particular IO device
> is connected to, or to identify an IIO PMON block to program for monitoring
> specific IIO stack assumes a lot of implicit knowledge about given Intel server
> platform architecture.
> 
> This patch set introduces:
>     An infrastructure for exposing an Uncore unit to Uncore PMON mapping through sysfs-backend
>     A new --iiostat mode in perf stat to provide I/O performance metrics per I/O device
> 
> Current version supports a server line starting Intel® Xeon® Processor Scalable
> Family and introduces mapping for IIO Uncore units only.
> Other units can be added on demand.
> 
> Usage example:
>     /sys/devices/uncore_<type>_<pmu_idx>/platform_mapping
> 
> Each Uncore unit type, by its nature, can be mapped to its own context, for example:
>     CHA - each uncore_cha_<pmu_idx> is assigned to manage a distinct slice of LLC capacity
>     UPI - each uncore_upi_<pmu_idx> is assigned to manage one link of Intel UPI Subsystem
>     IIO - each uncore_iio_<pmu_idx> is assigned to manage one stack of the IIO module
>     IMC - each uncore_imc_<pmu_idx> is assigned to manage one channel of Memory Controller
> 
> Implementation details:
>     Two callbacks added to struct intel_uncore_type to discover and map Uncore units to PMONs:
>         int (*get_topology)(struct intel_uncore_type *type)
>         int (*set_mapping)(struct intel_uncore_type *type)
> 
>     IIO stack to PMON mapping is exposed through
>         /sys/devices/uncore_iio_<pmu_idx>/platform_mapping
>         in the following format: domain:bus
> 
> Details of IIO Uncore unit mapping to IIO PMON:
> Each IIO stack is either a DMI port, x16 PCIe root port, MCP-Link or various
> built-in accelerators. For Uncore IIO Unit type, the platform_mapping file
> holds bus numbers of devices, which can be monitored by that IIO PMON block
> on each die.
> 
> For example, on a 4-die Intel Xeon® server platform:
>     $ cat /sys/devices/uncore_iio_0/platform_mapping
>     0000:00,0000:40,0000:80,0000:c0
> 
> Which means:
> IIO PMON block 0 on die 0 belongs to IIO stack located on bus 0x00, domain 0x0000
> IIO PMON block 0 on die 1 belongs to IIO stack located on bus 0x40, domain 0x0000
> IIO PMON block 0 on die 2 belongs to IIO stack located on bus 0x80, domain 0x0000
> IIO PMON block 0 on die 3 belongs to IIO stack located on bus 0xc0, domain 0x0000
> 
> Signed-off-by: Roman Sudarikov <roman.sudarikov@linux.intel.com>
> Co-developed-by: Alexander Antonov <alexander.antonov@intel.com>
> Signed-off-by: Alexander Antonov <alexander.antonov@intel.com>

Kan, can you help these people? There's a ton of process fail with this
submission. From SoB chain to CodingStyle to git-sendmail threading.

  parent reply	other threads:[~2019-12-02 14:01 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-26 16:36 [PATCH 0/6] perf x86: Exposing IO stack to IO PMON mapping through sysfs roman.sudarikov
2019-11-26 16:36 ` [PATCH 1/6] perf x86: Infrastructure for exposing an Uncore unit to PMON mapping roman.sudarikov
2019-11-26 16:36   ` [PATCH 2/6] perf tools: Helper functions to enumerate and probe PCI devices roman.sudarikov
2019-11-26 16:36     ` [PATCH 3/6] perf stat: Helper functions for list of IIO devices roman.sudarikov
2019-11-26 16:36       ` [PATCH 4/6] perf stat: New --iiostat mode to provide I/O performance metrics roman.sudarikov
2019-11-26 16:36         ` [PATCH 5/6] perf tools: Add feature check for libpci roman.sudarikov
2019-11-26 16:36           ` [PATCH 6/6] perf stat: Add PCI device name to --iiostat output roman.sudarikov
2019-12-02 14:00   ` Peter Zijlstra [this message]
2019-12-02 19:47   ` [PATCH 1/6] perf x86: Infrastructure for exposing an Uncore unit to PMON mapping Stephane Eranian
2019-12-03  3:00     ` Andi Kleen
2019-12-04 18:48     ` Sudarikov, Roman
2019-12-05 18:02       ` Stephane Eranian
2019-12-05 22:28         ` Andi Kleen
2019-12-06 16:08         ` Sudarikov, Roman

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