From: Vinod Koul <vkoul@kernel.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-msm@vger.kernel.org,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Vinod Koul <vkoul@kernel.org>, Andy Gross <agross@kernel.org>,
Can Guo <cang@codeaurora.org>,
Jeffrey Hugo <jeffrey.l.hugo@gmail.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 3/5] phy: qcom-qmp: Add optional SW reset
Date: Fri, 20 Dec 2019 15:47:17 +0530 [thread overview]
Message-ID: <20191220101719.3024693-4-vkoul@kernel.org> (raw)
In-Reply-To: <20191220101719.3024693-1-vkoul@kernel.org>
For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and
then deassert it, so add optional has_sw_reset flag and use that to
configure the QPHY_SW_RESET register.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 1196c85aa023..47a66d55107d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = {
static const unsigned int sm8150_ufsphy_regs_layout[] = {
[QPHY_START_CTRL] = QPHY_V4_PHY_START,
[QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS,
+ [QPHY_SW_RESET] = QPHY_V4_SW_RESET,
};
static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = {
@@ -1023,6 +1024,9 @@ struct qmp_phy_cfg {
/* true, if PCS block has no separate SW_RESET register */
bool no_pcs_sw_reset;
+
+ /* true if sw reset needs to be invoked */
+ bool has_sw_reset;
};
/**
@@ -1391,6 +1395,7 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = {
.is_dual_lane_phy = true,
.no_pcs_sw_reset = true,
+ .has_sw_reset = true,
};
static void qcom_qmp_phy_configure(void __iomem *base,
@@ -1475,6 +1480,9 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
}
+ if (cfg->has_sw_reset)
+ qphy_setbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
+
if (cfg->has_phy_com_ctrl)
qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
SW_PWRDN);
@@ -1651,6 +1659,9 @@ static int qcom_qmp_phy_enable(struct phy *phy)
if (cfg->has_phy_dp_com_ctrl)
qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
+ if (cfg->has_sw_reset)
+ qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
+
/* start SerDes and Phy-Coding-Sublayer */
qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
--
2.23.0
next prev parent reply other threads:[~2019-12-20 10:17 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-20 10:17 [PATCH v2 0/5] phy: qcom-qmp: Fixes and updates for sm8150 Vinod Koul
2019-12-20 10:17 ` [PATCH v2 1/5] phy: qcom-qmp: Increase PHY ready timeout Vinod Koul
2019-12-20 10:17 ` [PATCH v2 2/5] phy: qcom-qmp: Use register defines Vinod Koul
2019-12-23 8:43 ` Can Guo
2019-12-23 9:07 ` Can Guo
2019-12-20 10:17 ` Vinod Koul [this message]
2019-12-23 9:08 ` [PATCH v2 3/5] phy: qcom-qmp: Add optional SW reset Manu Gautam
2019-12-23 14:06 ` Vinod Koul
2019-12-20 10:17 ` [PATCH v2 4/5] phy: qcom-qmp: remove duplicate powerdown write Vinod Koul
2019-12-20 10:17 ` [PATCH v2 5/5] phy: qcom-qmp: remove no_pcs_sw_reset for sm8150 Vinod Koul
2019-12-20 11:29 ` [PATCH v2 0/5] phy: qcom-qmp: Fixes and updates " Kishon Vijay Abraham I
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191220101719.3024693-4-vkoul@kernel.org \
--to=vkoul@kernel.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=cang@codeaurora.org \
--cc=jeffrey.l.hugo@gmail.com \
--cc=kishon@ti.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox