From: Stephan Gerhold <stephan@gerhold.net>
To: Brian Masney <masneyb@onstation.org>
Cc: bjorn.andersson@linaro.org, agross@kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] firmware: qcom: scm: add 32 bit iommu page table support
Date: Wed, 1 Jan 2020 12:15:21 +0100 [thread overview]
Message-ID: <20200101111521.GA67534@gerhold.net> (raw)
In-Reply-To: <20200101033704.32264-1-masneyb@onstation.org>
On Tue, Dec 31, 2019 at 10:37:04PM -0500, Brian Masney wrote:
> Add 32 bit implmentations of the functions
> __qcom_scm_iommu_secure_ptbl_size() and
> __qcom_scm_iommu_secure_ptbl_init() that are required by the qcom_iommu
> driver.
>
> Signed-off-by: Brian Masney <masneyb@onstation.org>
> ---
> drivers/firmware/qcom_scm-32.c | 32 ++++++++++++++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
> index 48e2ef794ea3..f149a85d36b0 100644
> --- a/drivers/firmware/qcom_scm-32.c
> +++ b/drivers/firmware/qcom_scm-32.c
> @@ -638,13 +638,41 @@ int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id,
> int __qcom_scm_iommu_secure_ptbl_size(struct device *dev, u32 spare,
> size_t *size)
> {
> - return -ENODEV;
> + int psize[2] = { 0, 0 };
I would use an explicit size (i.e. __le32) here.
> + int ret;
> +
> + ret = qcom_scm_call(dev, QCOM_SCM_SVC_MP,
> + QCOM_SCM_IOMMU_SECURE_PTBL_SIZE,
> + &spare, sizeof(spare), &psize, sizeof(psize));
> + if (ret || psize[1])
> + return ret ? ret : -EINVAL;
> +
> + *size = psize[0];
> +
> + return 0;
> }
>
> int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr, u32 size,
> u32 spare)
> {
> - return -ENODEV;
> + struct msm_scm_ptbl_init {
> + __le32 paddr;
> + __le32 size;
> + __le32 spare;
> + } req;
> + int ret, scm_ret = 0;
> +
> + req.paddr = addr;
> + req.size = size;
> + req.spare = spare;
I'm not sure if there is actually anyone using qcom in BE mode (does
that even work?), but all the other methods in this file explicitly
convert using cpu_to_le32(), so this method should do the same :)
> +
> + ret = qcom_scm_call(dev, QCOM_SCM_SVC_MP,
> + QCOM_SCM_IOMMU_SECURE_PTBL_INIT,
> + &req, sizeof(req), &scm_ret, sizeof(scm_ret));
> + if (ret || scm_ret)
> + return ret ? ret : -EINVAL;
> +
> + return 0;
> }
>
> int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
> --
> 2.21.0
>
next prev parent reply other threads:[~2020-01-01 11:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-01 3:37 [PATCH] firmware: qcom: scm: add 32 bit iommu page table support Brian Masney
2020-01-01 11:15 ` Stephan Gerhold [this message]
2020-01-01 20:14 ` Rob Clark
2020-01-05 6:56 ` Stephen Boyd
2020-01-02 7:36 ` Bjorn Andersson
2020-01-02 8:50 ` Brian Masney
2020-01-04 2:24 ` Brian Masney
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