From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E220C33CAF for ; Thu, 16 Jan 2020 18:11:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E06B320684 for ; Thu, 16 Jan 2020 18:10:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579198260; bh=E1kIdxwQ9tvKVB82zvpt+3f0RLC2wtqLWGKMLnStV5A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=A5ovNhR5fkB8ojJIl/eh4volxEywkyW5nt12GnrjSYhL3bDs1DEpRkYTUts1MaabN uJgUGZAfSenEndQMvDeYGqQJV4mqkQInDhbuoTZlecg8D2guilsmqhpBiTkMUYKpcZ GcW5OSOjVCRJv5/fRl5g/amwvL7qBQPh8ot4ZNnk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2395185AbgAPSK6 (ORCPT ); Thu, 16 Jan 2020 13:10:58 -0500 Received: from mail.kernel.org ([198.145.29.99]:53098 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2405433AbgAPRhk (ORCPT ); Thu, 16 Jan 2020 12:37:40 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 83232207FF; Thu, 16 Jan 2020 17:37:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579196260; bh=E1kIdxwQ9tvKVB82zvpt+3f0RLC2wtqLWGKMLnStV5A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ruKwXRYZDjGISqeh8XUvQ8OhAzHXDH6XBo5FJciRv1iHuPZke9FUa7yNV8mYud+qD hMya0dZ/ZGE7Ai66acc5brKwhvnNSwAyXemjp9iSQ14a+zA/oUkYLF0I4iDIN/o0vM eQpG7Tgk3zKai27AocCW+4r9/JqVmjIKqJxNND+c= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Chen-Yu Tsai , Maxime Ripard , Daniel Lezcano , Sasha Levin , linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 4.9 085/251] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable Date: Thu, 16 Jan 2020 12:33:54 -0500 Message-Id: <20200116173641.22137-45-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200116173641.22137-1-sashal@kernel.org> References: <20200116173641.22137-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chen-Yu Tsai [ Upstream commit e7e7e0d7beafebd11b0c065cd5fbc1e5759c5aab ] If the clock tree is not fully populated when the timer-sun5i init code is called, attempts to get the clock rate for the timer would fail and return 0. Make the init code for both clock events and clocksource check the returned clock rate and fail gracefully if the result is 0, instead of causing a divide by 0 exception later on. Fixes: 4a59058f0b09 ("clocksource/drivers/sun5i: Refactor the current code") Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Signed-off-by: Daniel Lezcano Signed-off-by: Sasha Levin --- drivers/clocksource/timer-sun5i.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c index 4f87f3e76d83..c3e96de525a2 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -201,6 +201,11 @@ static int __init sun5i_setup_clocksource(struct device_node *node, } rate = clk_get_rate(clk); + if (!rate) { + pr_err("Couldn't get parent clock rate\n"); + ret = -EINVAL; + goto err_disable_clk; + } cs->timer.base = base; cs->timer.clk = clk; @@ -274,6 +279,11 @@ static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem } rate = clk_get_rate(clk); + if (!rate) { + pr_err("Couldn't get parent clock rate\n"); + ret = -EINVAL; + goto err_disable_clk; + } ce->timer.base = base; ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); -- 2.20.1