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[178.15.117.54]) by smtp.gmail.com with ESMTPSA id p17sm43347877wrx.20.2020.01.19.06.56.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jan 2020 06:56:55 -0800 (PST) From: shiva.linuxworks@gmail.com X-Google-Original-From: sshivamurthy@micron.com To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Boris Brezillon , Frieder Schrempf , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Shivamurthy Shastri Subject: [PATCH 3/4] mtd: spinand: Add M70A series Micron SPI NAND devices Date: Sun, 19 Jan 2020 15:54:31 +0100 Message-Id: <20200119145432.10405-4-sshivamurthy@micron.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200119145432.10405-1-sshivamurthy@micron.com> References: <20200119145432.10405-1-sshivamurthy@micron.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shivamurthy Shastri Add device table for M70A series Micron SPI NAND devices. While at it, disable the Continuous Read feature which is enabled by default. Signed-off-by: Shivamurthy Shastri --- drivers/mtd/nand/spi/micron.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index 5fd1f921ef12..45fc37c58f8a 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -131,6 +131,26 @@ static const struct spinand_info micron_spinand_table[] = { 0, SPINAND_ECCINFO(µn_8_ooblayout, micron_8_ecc_get_status)), + /* M70A 4Gb 3.3V */ + SPINAND_INFO("MT29F4G01ABAFD", 0x34, + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status)), + /* M70A 4Gb 1.8V */ + SPINAND_INFO("MT29F4G01ABBFD", 0x35, + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(µn_8_ooblayout, + micron_8_ecc_get_status)), }; static int micron_spinand_detect(struct spinand_device *spinand) @@ -153,8 +173,19 @@ static int micron_spinand_detect(struct spinand_device *spinand) return 1; } +static int micron_spinand_init(struct spinand_device *spinand) +{ + /* + * M70A device series enable Continuous Read feature at Power-up, + * which is not supported. Disable this bit to avoid any possible + * failure. + */ + return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0); +} + static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = { .detect = micron_spinand_detect, + .init = micron_spinand_init, }; const struct spinand_manufacturer micron_spinand_manufacturer = { -- 2.17.1