Re: [PATCH 4/4] mtd: spinand: Add new Micron SPI NAND devices with multiple dies

Miquel Raynal
2020-01-20T10:22:28Z

Hi Shiva,

shiva.linuxworks@gmail.com wrote on Sun, 19 Jan 2020 15:54:32 +0100:

> From: Shivamurthy Shastri <sshivamurthy@micron.com>
>
> Add device table for new Micron SPI NAND devices, which have multiple
> dies. While at it, add support to select the die.

Same comment as in 3/4.

>
> Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
> ---
> drivers/mtd/nand/spi/micron.c | 50 +++++++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index 45fc37c58f8a..03b486843210 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -18,6 +18,8 @@
> #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
> #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
>
> +#define MICRON_DIE_SELECTION_BIT 6
> +
> static SPINAND_OP_VARIANTS(read_cache_variants,
> SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
> SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> @@ -64,6 +66,21 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = {
> .free = micron_8_ooblayout_free,
> };
>
> +static int micron_select_target(struct spinand_device *spinand,
> + unsigned int target)
> +{
> + struct spi_mem_op op = SPINAND_SET_FEATURE_OP(0xd0,
> + spinand->scratchbuf);
> +
> + /*
> + * As per datasheet, die selection is done by the 6th bit of Die
> + * Select Register (Address 0xD0).
> + */

I would put this comment close to the macro definition.

> + *spinand->scratchbuf = target << MICRON_DIE_SELECTION_BIT;

Either target is or or 1 and you can use the BIT macro, or you suppose
it can go higher and the _BIT suffix does not fit. _SHIFT would work
and creating a macro directly would be even better.

> +
> + return spi_mem_exec_op(spinand->spimem, &op);
> +}
> +

Where is this function used?

> static int micron_8_ecc_get_status(struct spinand_device *spinand,
> u8 status)
> {
> @@ -131,6 +148,17 @@ static const struct spinand_info micron_spinand_table[] = {
> 0,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M79A 4Gb 3.3V */
> + SPINAND_INFO("MT29F4G01ADAGD", 0x36,
> + NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> /* M70A 4Gb 3.3V */
> SPINAND_INFO("MT29F4G01ABAFD", 0x34,
> NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> @@ -151,6 +179,28 @@ static const struct spinand_info micron_spinand_table[] = {
> 0,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M70A 8Gb 3.3V */
> + SPINAND_INFO("MT29F8G01ADAFD", 0x46,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> + /* M70A 8Gb 1.8V */
> + SPINAND_INFO("MT29F8G01ADBFD", 0x47,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> };
>
> static int micron_spinand_detect(struct spinand_device *spinand)

Thanks,
Miquèl