From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 486EBC2D0DB for ; Fri, 24 Jan 2020 09:42:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 107F7208C4 for ; Fri, 24 Jan 2020 09:42:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579858969; bh=EJjOkHR2Y5uXiUlpzZR4cH7KcFllZ2USANg/jXz6zDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=LD+3q7arhiiQfvptgLyem5SqqswjVPiZgpHEZvV5W/F5u+qhPzKHftXLRT4itX7// 4/ZsvNJVCSmtm39ie+UIbpFPKc3nbcdBhM2l3US1BHBi+Pp2/4g2sfCtfPxKbEq3ll z7rYZJ31cqT72cGu+P8Eqty2x3DqcXLyIBm1eH1w= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732824AbgAXJmr (ORCPT ); Fri, 24 Jan 2020 04:42:47 -0500 Received: from mail.kernel.org ([198.145.29.99]:40408 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733147AbgAXJmm (ORCPT ); Fri, 24 Jan 2020 04:42:42 -0500 Received: from localhost (unknown [145.15.244.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 70F7D208C4; Fri, 24 Jan 2020 09:42:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579858962; bh=EJjOkHR2Y5uXiUlpzZR4cH7KcFllZ2USANg/jXz6zDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wa3Iuymj8Ay2TvRHOemequLhgwYfublyZZ5iPZZLBk6jGk9VYCziZZh9ccF5pzWqL lXG4KyxXzVxZBSEmRm0bjzaAwz/yiOsG1WkViowBUDvBJUfI2wGRpV1rfu7o2M6S48 atjjpGSq7E7ogsQ8niRTa1LMY9uOsFvO/LacBn+E= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jonas Karlman , Kishon Vijay Abraham I , Sasha Levin Subject: [PATCH 5.4 101/102] phy/rockchip: inno-hdmi: round clock rate down to closest 1000 Hz Date: Fri, 24 Jan 2020 10:31:42 +0100 Message-Id: <20200124092822.003655840@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200124092806.004582306@linuxfoundation.org> References: <20200124092806.004582306@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jonas Karlman [ Upstream commit 4f510aa10468954b1da4e94689c38ac6ea8d3627 ] Commit 287422a95fe2 ("drm/rockchip: Round up _before_ giving to the clock framework") changed what rate clk_round_rate() is called with, an additional 999 Hz added to the requsted mode clock. This has caused a regression on RK3328 and presumably also on RK3228 because the inno-hdmi-phy clock requires an exact match of the requested rate in the pre pll config table. When an exact match is not found the parent clock rate (24MHz) is returned to the clk_round_rate() caller. This cause wrong pixel clock to be used and result in no-signal when configuring a mode on RK3328. Fix this by rounding the rate down to closest 1000 Hz in round_rate func, this allows an exact match to be found in pre pll config table. Fixes: 287422a95fe2 ("drm/rockchip: Round up _before_ giving to the clock framework") Signed-off-by: Jonas Karlman Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sasha Levin --- drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 2b97fb1185a00..9ca20c947283d 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -603,6 +603,8 @@ static long inno_hdmi_phy_rk3228_clk_round_rate(struct clk_hw *hw, { const struct pre_pll_config *cfg = pre_pll_cfg_table; + rate = (rate / 1000) * 1000; + for (; cfg->pixclock != 0; cfg++) if (cfg->pixclock == rate && !cfg->fracdiv) break; @@ -755,6 +757,8 @@ static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw, { const struct pre_pll_config *cfg = pre_pll_cfg_table; + rate = (rate / 1000) * 1000; + for (; cfg->pixclock != 0; cfg++) if (cfg->pixclock == rate) break; -- 2.20.1