From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C190EC35242 for ; Fri, 24 Jan 2020 09:51:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8EDB0214AF for ; Fri, 24 Jan 2020 09:51:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579859479; bh=karqSpi1eGtZ7fJsGTc6LA/4uwUn+antl6nfbZc0Z2E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=olhLEDf/HHJDNjg4aqHChy1U84kBSkt/u8LH4YTXwveEL/1GSzQ93pN3h1PxY2dkx /A2fIFVzwg6F/M7v3eTjVEjl0/NEeiNhxszoPKxJZSgRfKp5VKAP7pTdBOswx+CfgW L9QDnarnDTfaR5bdR0PqWHQaXxgluTzDhiIVne+E= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388017AbgAXJvT (ORCPT ); Fri, 24 Jan 2020 04:51:19 -0500 Received: from mail.kernel.org ([198.145.29.99]:52472 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730738AbgAXJvS (ORCPT ); Fri, 24 Jan 2020 04:51:18 -0500 Received: from localhost (unknown [145.15.244.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id F205420718; Fri, 24 Jan 2020 09:51:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579859477; bh=karqSpi1eGtZ7fJsGTc6LA/4uwUn+antl6nfbZc0Z2E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DO1YsCYv8A3kiniCUL3IEv/Inth35YL74nBs5ELJ3Mu/O4SL6jpx6qtwBsL/EkfCF r6K/r05JCApjkkARlvc7rCl34xAbm/Teqor4CVaQQNGXXWSuqt6XSEEWWaXyeDr7Bt fSVnmtg7e+zGUodc0qmFfSs4mNPwxcYxwDoKa2LE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Chen-Yu Tsai , Maxime Ripard , Daniel Lezcano , Sasha Levin Subject: [PATCH 4.14 125/343] clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable Date: Fri, 24 Jan 2020 10:29:03 +0100 Message-Id: <20200124092936.444496393@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200124092919.490687572@linuxfoundation.org> References: <20200124092919.490687572@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chen-Yu Tsai [ Upstream commit e7e7e0d7beafebd11b0c065cd5fbc1e5759c5aab ] If the clock tree is not fully populated when the timer-sun5i init code is called, attempts to get the clock rate for the timer would fail and return 0. Make the init code for both clock events and clocksource check the returned clock rate and fail gracefully if the result is 0, instead of causing a divide by 0 exception later on. Fixes: 4a59058f0b09 ("clocksource/drivers/sun5i: Refactor the current code") Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Signed-off-by: Daniel Lezcano Signed-off-by: Sasha Levin --- drivers/clocksource/timer-sun5i.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c index 2a3fe83ec3377..6f4a9a8faccc2 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -202,6 +202,11 @@ static int __init sun5i_setup_clocksource(struct device_node *node, } rate = clk_get_rate(clk); + if (!rate) { + pr_err("Couldn't get parent clock rate\n"); + ret = -EINVAL; + goto err_disable_clk; + } cs->timer.base = base; cs->timer.clk = clk; @@ -275,6 +280,11 @@ static int __init sun5i_setup_clockevent(struct device_node *node, void __iomem } rate = clk_get_rate(clk); + if (!rate) { + pr_err("Couldn't get parent clock rate\n"); + ret = -EINVAL; + goto err_disable_clk; + } ce->timer.base = base; ce->timer.ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); -- 2.20.1