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[79.176.41.183]) by smtp.gmail.com with ESMTPSA id k15sm3284451qkk.103.2020.02.11.23.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Feb 2020 23:33:24 -0800 (PST) Date: Wed, 12 Feb 2020 02:33:19 -0500 From: "Michael S. Tsirkin" To: "Liu, Jing2" Cc: Jason Wang , Zha Bin , linux-kernel@vger.kernel.org, virtio-dev@lists.oasis-open.org, slp@redhat.com, qemu-devel@nongnu.org, chao.p.peng@linux.intel.com, gerry@linux.alibaba.com Subject: Re: [virtio-dev] Re: [PATCH v2 4/5] virtio-mmio: add MSI interrupt feature support Message-ID: <20200212023051-mutt-send-email-mst@kernel.org> References: <4c3d13be5a391b1fc50416838de57d903cbf8038.1581305609.git.zhabin@linux.alibaba.com> <0c71ff9d-1a7f-cfd2-e682-71b181bdeae4@redhat.com> <5522f205-207b-b012-6631-3cc77dde3bfe@linux.intel.com> <45e22435-08d3-08fe-8843-d8db02fcb8e3@redhat.com> <4c19292f-9d25-a859-3dde-6dd5a03fdf0b@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <4c19292f-9d25-a859-3dde-6dd5a03fdf0b@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 12, 2020 at 11:54:53AM +0800, Liu, Jing2 wrote: > > On 2/11/2020 3:40 PM, Jason Wang wrote: > > > On 2020/2/11 下午2:02, Liu, Jing2 wrote: > > > > On 2/11/2020 12:02 PM, Jason Wang wrote: > > > On 2020/2/11 上午11:35, Liu, Jing2 wrote: > > > On 2/11/2020 11:17 AM, Jason Wang wrote: > > > On 2020/2/10 下午5:05, Zha Bin wrote: > > From: Liu Jiang > > Userspace VMMs (e.g. Qemu microvm, Firecracker) take > advantage of using > virtio over mmio devices as a lightweight machine model > for modern > cloud. The standard virtio over MMIO transport layer > only supports one > legacy interrupt, which is much heavier than virtio > over PCI transport > layer using MSI. Legacy interrupt has long work path > and causes specific > VMExits in following cases, which would considerably > slow down the > performance: > > 1) read interrupt status register > 2) update interrupt status register > 3) write IOAPIC EOI register > > We proposed to add MSI support for virtio over MMIO via > new feature > bit VIRTIO_F_MMIO_MSI[1] which increases the interrupt > performance. > > With the VIRTIO_F_MMIO_MSI feature bit supported, the > virtio-mmio MSI > uses msi_sharing[1] to indicate the event and vector > mapping. > Bit 1 is 0: device uses non-sharing and fixed vector > per event mapping. > Bit 1 is 1: device uses sharing mode and dynamic > mapping. > > > > I believe dynamic mapping should cover the case of fixed > vector? > > > Actually this bit *aims* for msi sharing or msi non-sharing. > > It means, when msi sharing bit is 1, device doesn't want vector > per queue > > (it wants msi vector sharing as name) and doesn't want a high > interrupt rate. > > So driver turns to !per_vq_vectors and has to do dynamical > mapping. > > So they are opposite not superset. > > Thanks! > > Jing > > > > I think you need add more comments on the command. > > E.g if I want to map vector 0 to queue 1, how do I need to do? > > write(1, queue_sel); > write(0, vector_sel); > > > That's true. Besides, two commands are used for msi sharing mode, > > VIRTIO_MMIO_MSI_CMD_MAP_CONFIG and VIRTIO_MMIO_MSI_CMD_MAP_QUEUE. > > "To set up the event and vector mapping for MSI sharing mode, driver > SHOULD write a valid MsiVecSel followed by > VIRTIO_MMIO_MSI_CMD_MAP_CONFIG/VIRTIO_MMIO_MSI_CMD_MAP_QUEUE command to > map the configuration change/selected queue events respectively.  " > (See spec patch 5/5) > > So if driver detects the msi sharing mode, when it does setup vq, > writes the queue_sel (this already exists in setup vq), vector sel and > then MAP_QUEUE command to do the queue event mapping. > > > > So actually the per vq msix could be done through this. > > Right, per vq msix can also be mapped by the 2 commands if we want.  > > The current design benefits for those devices requesting per vq msi that driver > > doesn't have to map during setup each queue, > > since we define the relationship by default. Point being to save some exits for configuration? How much does it save? IMHO we need to find a way to drastically simplify this interface, to cut down the new LOC to at most 100-200, proportionally to the performance gain it gives. > > I don't get why you need to introduce MSI_SHARING_MASK which is the charge > of driver instead of device. > > MSI_SHARING_MASK is just for identifying the msi_sharing bit in readl(MsiState) > (0x0c4). The device tells whether it wants msi_sharing. > > MsiState register: R > > le32 { >     msi_enabled : 1; >     msi_sharing: 1; >     reserved : 30; > }; > > The interrupt rate should have no direct relationship with whether it has > been shared or not. > > > > Btw, you introduce mask/unmask without pending, how to deal with the lost > interrupt during the masking then? > > > > For msi non-sharing mode, no special action is needed because we make > the rule of per_vq_vector and fixed relationship. > > Correct me if this is not that clear for spec/code comments. > > > > The ABI is not as straightforward as PCI did. Why not just reuse the PCI > layout? > > E.g having > > queue_sel > queue_msix_vector > msix_config > > for configuring map between msi vector and queues/config > > Thanks for the advice. :) > > Actually when looking into pci, the queue_msix_vector/msix_config is the msi > vector index, which is the same as the mmio register MsiVecSel (0x0d0). > > So we don't introduce two extra registers for mapping even in sharing mode. > > What do you think? > > > > Then > > vector_sel > address > data > pending > mask > unmask > > for configuring msi table? > > PCI-like msix table is not introduced to device and instead simply use commands > to tell the mask/configure/enable. > > Thanks! > > Jing > > > Thanks > > > > Thanks! > > Jing > > > > > ? > > Thanks > > > > > > > Thanks > > > > --------------------------------------------------------------------- > > To unsubscribe, e-mail: > virtio-dev-unsubscribe@lists.oasis-open.org > For additional commands, e-mail: > virtio-dev-help@lists.oasis-open.org > > > > > > > >