[PATCH RFC v3 5/6] dt-bindings: display: add Unisoc's mipi dsi&dphy bindings

Kevin Tang
2020-02-21T07:49:25Z

From: Kevin Tang <kevin.tang@unisoc.com>

Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)
support for Unisoc's display subsystem.

Cc: Orson Zhai <orsonzhai@gmail.com>
Cc: Baolin Wang <baolin.wang@linaro.org>
Cc: Chunyan Zhang <zhang.lyra@gmail.com>
Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>
---
.../devicetree/bindings/display/sprd/dphy.yaml | 78 ++++++++++++++++
.../devicetree/bindings/display/sprd/dsi.yaml | 101 +++++++++++++++++++++
2 files changed, 179 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sprd/dphy.yaml
create mode 100644 Documentation/devicetree/bindings/display/sprd/dsi.yaml

diff --git a/Documentation/devicetree/bindings/display/sprd/dphy.yaml b/Documentation/devicetree/bindings/display/sprd/dphy.yaml
new file mode 100644
index 0000000..bd7819c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sprd/dphy.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/sprd/dphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Unisoc MIPI DSI-PHY (D-PHY)
+
+maintainers:
+ - David Airlie <airlied@linux.ie>
+ - Daniel Vetter <daniel@ffwll.ch>
+ - Rob Herring <robh+dt@kernel.org>
+ - Mark Rutland <mark.rutland@arm.com>
+
+properties:
+ compatible:
+ const: sprd,sharkl3-dsi-phy
+
+ reg:
+ maxItems: 1
+ description:
+ Must be the dsi controller base address.
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ port@0:
+ type: object
+ description:
+ A port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+ That port should be the output endpoint, usually output to
+ the associated panel.
+ port@1:
+ type: object
+ description:
+ A port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+ That port should be the input endpoint, usually coming from
+ the associated DSI controller.
+
+required:
+ - compatible
+ - reg
+ - port@0
+ - port@1
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ dphy: dphy {
+ compatible = "sprd,sharkl3-dsi-phy";
+ reg = <0x0 0x63100000 0x0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* input port*/
+ port@1 {
+ reg = <1>;
+ dphy_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+
+ /* output port */
+ port@0 {
+ reg = <0>;
+ dphy_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/display/sprd/dsi.yaml b/Documentation/devicetree/bindings/display/sprd/dsi.yaml
new file mode 100644
index 0000000..198ac31
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sprd/dsi.yaml
@@ -0,0 +1,101 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/sprd/dsi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Unisoc MIPI DSI Master
+
+maintainers:
+ - David Airlie <airlied@linux.ie>
+ - Daniel Vetter <daniel@ffwll.ch>
+ - Rob Herring <robh+dt@kernel.org>
+ - Mark Rutland <mark.rutland@arm.com>
+
+properties:
+ compatible:
+ const: sprd,sharkl3-dsi-host
+
+ reg:
+ maxItems: 1
+ description:
+ Physical base address and length of the registers set for the device.
+
+ interrupts:
+ maxItems: 2
+ description:
+ Should contain DSI interrupt.
+
+ clocks:
+ minItems: 1
+
+ clock-names:
+ items:
+ - const: clk_src_96m
+
+ power-domains:
+ maxItems: 1
+ description: A phandle to DSIM power domain node
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ port@0:
+ type: object
+ description:
+ A port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+ That port should be the input endpoint, usually coming from
+ the associated DPU.
+ port@1:
+ type: object
+ description:
+ A port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt.
+ That port should be the output endpoint, usually output to
+ the associated DPHY.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - port@0
+ - port@1
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/sprd,sc9860-clk.h>
+ dsi: dsi@0x63100000 {
+ compatible = "sprd,sharkl3-dsi-host";
+ reg = <0 0x63100000 0 0x1000>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "clk_src_96m";
+ clocks = <&pll CLK_TWPLL_96M>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint = <&dpu_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi_out: endpoint@1 {
+ remote-endpoint = <&dphy_in>;
+ };
+ };
+ };
--
2.7.4