From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Steven Rostedt <rostedt@goodmis.org>,
Brian Gerst <brgerst@gmail.com>, Juergen Gross <jgross@suse.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Arnd Bergmann <arnd@arndb.de>
Subject: [patch 05/15] x86/entry: Provide IDTEnTRY_SYSVEC
Date: Tue, 25 Feb 2020 23:47:24 +0100 [thread overview]
Message-ID: <20200225231609.412892623@linutronix.de> (raw)
In-Reply-To: 20200225224719.950376311@linutronix.de
Provide a IDTENTRY variant for system vectors to consolidate the differnt
mechanisms to emit the ASM stubs for 32 an 64 bit.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/entry/entry_32.S | 4 ++++
arch/x86/entry/entry_64.S | 19 +++++++++++++++----
arch/x86/include/asm/idtentry.h | 25 +++++++++++++++++++++++++
3 files changed, 44 insertions(+), 4 deletions(-)
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -1261,6 +1261,10 @@ SYM_CODE_START_LOCAL(asm_\cfunc)
SYM_CODE_END(asm_\cfunc)
.endm
+.macro idtentry_sysvec vector cfunc
+ idtentry \vector asm_\cfunc \cfunc has_error_code=0
+.endm
+
/*
* Include the defines which emit the idt entries which are shared
* shared between 32 and 64 bit.
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -577,6 +577,21 @@ SYM_CODE_END(\asmsym)
.endm
/*
+ * System vectors which invoke their handlers directly and are not
+ * going through the regular common device interrupt handling code.
+ *
+ * Stick them all into the irqentry.text section.
+ */
+#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
+#define POP_SECTION_IRQENTRY .popsection
+
+.macro idtentry_sysvec vector cfunc
+ PUSH_SECTION_IRQENTRY
+ idtentry \vector asm_\cfunc \cfunc has_error_code=0 irq_stack=0
+ POP_SECTION_IRQENTRY
+.endm
+
+/*
* MCE and DB exceptions
*/
#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + (x) * 8)
@@ -973,10 +988,6 @@ SYM_CODE_END(\sym)
_ASM_NOKPROBE(\sym)
.endm
-/* Make sure APIC interrupt handlers end up in the irqentry section: */
-#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
-#define POP_SECTION_IRQENTRY .popsection
-
.macro apicinterrupt num sym do_sym
PUSH_SECTION_IRQENTRY
apicinterrupt3 \num \sym \do_sym
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -210,6 +210,27 @@ NOKPROBE_SYMBOL(func); \
\
static __always_inline void __##func(struct pt_regs *regs, \
unsigned long vector)
+/**
+ * DECLARE_IDTENTRY_SYSVEC - Declare functions for system vector entry points
+ * @vector: Vector number (ignored for C)
+ * @func: Function name of the entry point
+ *
+ * Declares three functions:
+ * - The ASM entry point: asm_##func
+ * - The XEN PV trap entry point: xen_##func (maybe unused)
+ * - The C handler called from the ASM entry point
+ */
+#define DECLARE_IDTENTRY_SYSVEC(vector, func) \
+ DECLARE_IDTENTRY(vector, func)
+
+/**
+ * DEFINE_IDTENTRY_SYSVEC - Emit code for system vector IDT entry points
+ * @func: Function name of the entry point
+ *
+ * @func is called from ASM entry code with interrupts disabled.
+ */
+#define DEFINE_IDTENTRY_SYSVEC(func) \
+ DEFINE_IDTENTRY(func)
#ifdef CONFIG_X86_64
/**
@@ -384,6 +405,10 @@ static __always_inline void __##func(str
#define DECLARE_IDTENTRY_IRQ(vector, func) \
idtentry_irq vector func
+/* System vector entries */
+#define DECLARE_IDTENTRY_SYSVEC(__vector, __func) \
+ idtentry_sysvec __vector __func
+
#ifdef CONFIG_X86_64
# define DECLARE_IDTENTRY_MCE(vector, func) \
idtentry_mce_db vector asm_##func func
next prev parent reply other threads:[~2020-02-25 23:26 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-25 22:47 [patch 00/15] x86/entry: Consolidation - Part V Thomas Gleixner
2020-02-25 22:47 ` [patch 01/15] x86/irq: Convey vector as argument and not in ptregs Thomas Gleixner
2020-02-26 5:13 ` Andy Lutomirski
2020-02-26 5:45 ` Brian Gerst
2020-02-26 20:13 ` Thomas Gleixner
2020-02-26 21:35 ` Andy Lutomirski
2020-02-26 23:50 ` Thomas Gleixner
2020-02-26 21:54 ` Brian Gerst
2020-02-26 23:43 ` Thomas Gleixner
2020-02-27 0:04 ` Brian Gerst
2020-02-25 22:47 ` [patch 02/15] x86/entry/64: Add ability to switch to IRQ stacks in idtentry Thomas Gleixner
2020-02-25 22:47 ` [patch 03/15] x86/entry: Add IRQENTRY_IRQ macro Thomas Gleixner
2020-02-26 15:05 ` Miroslav Benes
2020-02-25 22:47 ` [patch 04/15] x86/entry: Use idtentry for interrupts Thomas Gleixner
2020-02-25 22:47 ` Thomas Gleixner [this message]
2020-02-26 6:10 ` [patch 05/15] x86/entry: Provide IDTEnTRY_SYSVEC Andy Lutomirski
2020-02-26 20:15 ` Thomas Gleixner
2020-02-25 22:47 ` [patch 06/15] x86/entry: Convert APIC interrupts to IDTENTRY_SYSVEC Thomas Gleixner
2020-02-25 22:47 ` [patch 07/15] x86/entry: Convert SMP system vectors " Thomas Gleixner
2020-02-25 22:47 ` [patch 08/15] x86/entry: Convert various system vectors Thomas Gleixner
2020-02-25 22:47 ` [patch 09/15] x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC Thomas Gleixner
2020-02-26 10:54 ` Paolo Bonzini
2020-02-25 22:47 ` [patch 10/15] x86/entry: Convert various hypervisor " Thomas Gleixner
2020-02-25 22:47 ` [patch 11/15] x86/entry: Convert XEN hypercall vector " Thomas Gleixner
2020-02-25 22:47 ` [patch 12/15] x86/entry: Remove the apic/BUILD interrupt leftovers Thomas Gleixner
2020-02-25 22:47 ` [patch 13/15] x86/entry/32: Remove redundant irq disable code Thomas Gleixner
2020-02-25 22:47 ` [patch 14/15] x86/entry: Provide return_from exception() Thomas Gleixner
2020-02-25 22:47 ` [patch 15/15] x86/entry: Use return_from_exception() Thomas Gleixner
2020-02-26 9:53 ` [patch 00/15] x86/entry: Consolidation - Part V Peter Zijlstra
2020-02-26 10:02 ` Peter Zijlstra
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