From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4415DC4BA1E for ; Wed, 26 Feb 2020 17:29:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 255A0222C2 for ; Wed, 26 Feb 2020 17:29:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726875AbgBZR36 (ORCPT ); Wed, 26 Feb 2020 12:29:58 -0500 Received: from muru.com ([72.249.23.125]:57796 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726661AbgBZR35 (ORCPT ); Wed, 26 Feb 2020 12:29:57 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 299058022; Wed, 26 Feb 2020 17:30:42 +0000 (UTC) Date: Wed, 26 Feb 2020 09:29:54 -0800 From: Tony Lindgren To: Lokesh Vutla Cc: Daniel Lezcano , Thomas Gleixner , Linux OMAP Mailing List , linux-kernel@vger.kernel.org, narmstrong@baylibre.com, Sekhar Nori , Tero Kristo Subject: Re: [PATCH 2/2] clocksource: timer-ti-dm: Do not update counter on updating the period Message-ID: <20200226172954.GR37466@atomide.com> References: <20200224050753.17784-1-lokeshvutla@ti.com> <20200224050753.17784-3-lokeshvutla@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200224050753.17784-3-lokeshvutla@ti.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Lokesh Vutla [200224 05:09]: > Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value > in Load register(OMAP_TIMER_LOAD_REG) into Counter register > (OMAP_TIMER_COUNTER_REG). > > omap_dm_timer_set_load() writes into trigger register every time load > register is updated. When timer is configured in pwm mode, this causes > disruption in current pwm cycle, which is not expected especially when > pwm is used as PPS signal for synchronized PTP clocks. So do not write > into trigger register on updating the period. This patch without patch 1/2 applied still works for me: Tested-by: Tony Lindgren