From: Mans Rullgard <mans@mansr.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] ARM: dts: sunxi: h3/h5: add r_pwm node
Date: Wed, 26 Feb 2020 18:33:16 +0000 [thread overview]
Message-ID: <20200226183316.26159-1-mans@mansr.com> (raw)
There is a second PWM unit available in the PL I/O block.
Add a node and pinmux definition for it.
Signed-off-by: Mans Rullgard <mans@mansr.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 107eeafad20a..1842c9f12c36 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -871,6 +871,19 @@
pins = "PL0", "PL1";
function = "s_i2c";
};
+
+ r_pwm_pins: r-pwm-pins {
+ pins = "PL10";
+ function = "s_pwm";
+ };
+ };
+
+ r_pwm: pwm@1f03800 {
+ compatible = "allwinner,sun8i-h3-pwm";
+ reg = <0x01f03800 0x8>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
};
};
};
--
2.25.0
next reply other threads:[~2020-02-26 18:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-26 18:33 Mans Rullgard [this message]
2020-02-27 3:03 ` [PATCH] ARM: dts: sunxi: h3/h5: add r_pwm node Chen-Yu Tsai
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