From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DD22C35E17 for ; Thu, 27 Feb 2020 18:23:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 53E93246A6 for ; Thu, 27 Feb 2020 18:23:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731121AbgB0SXI (ORCPT ); Thu, 27 Feb 2020 13:23:08 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:41158 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731023AbgB0SWw (ORCPT ); Thu, 27 Feb 2020 13:22:52 -0500 Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id CED9829645A; Thu, 27 Feb 2020 18:22:50 +0000 (GMT) Date: Thu, 27 Feb 2020 19:22:47 +0100 From: Boris Brezillon To: shiva.linuxworks@gmail.com Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Frieder Schrempf , Boris Brezillon , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Shivamurthy Shastri Subject: Re: [PATCH v4 2/5] mtd: spinand: micron: Add new Micron SPI NAND devices Message-ID: <20200227192247.52f84723@collabora.com> In-Reply-To: <20200206202206.14770-3-sshivamurthy@micron.com> References: <20200206202206.14770-1-sshivamurthy@micron.com> <20200206202206.14770-3-sshivamurthy@micron.com> Organization: Collabora X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 6 Feb 2020 21:22:03 +0100 shiva.linuxworks@gmail.com wrote: > From: Shivamurthy Shastri > > Add device table for M79A and M78A series Micron SPI NAND devices. > > Signed-off-by: Shivamurthy Shastri > --- > drivers/mtd/nand/spi/micron.c | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c > index c028d0d7e236..5fd1f921ef12 100644 > --- a/drivers/mtd/nand/spi/micron.c > +++ b/drivers/mtd/nand/spi/micron.c > @@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct spinand_device *spinand, > } > > static const struct spinand_info micron_spinand_table[] = { > + /* M79A 2Gb 3.3V */ Should be added in a separate patch. > SPINAND_INFO("MT29F2G01ABAGD", 0x24, > NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), > NAND_ECCREQ(8, 512), > @@ -100,6 +101,36 @@ static const struct spinand_info micron_spinand_table[] = { > 0, > SPINAND_ECCINFO(µn_8_ooblayout, > micron_8_ecc_get_status)), > + /* M79A 2Gb 1.8V */ > + SPINAND_INFO("MT29F2G01ABBGD", 0x25, > + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), > + NAND_ECCREQ(8, 512), > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, > + &write_cache_variants, > + &update_cache_variants), > + 0, > + SPINAND_ECCINFO(µn_8_ooblayout, > + micron_8_ecc_get_status)), > + /* M78A 1Gb 3.3V */ > + SPINAND_INFO("MT29F1G01ABAFD", 0x14, > + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), > + NAND_ECCREQ(8, 512), > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, > + &write_cache_variants, > + &update_cache_variants), > + 0, > + SPINAND_ECCINFO(µn_8_ooblayout, > + micron_8_ecc_get_status)), > + /* M78A 1Gb 1.8V */ > + SPINAND_INFO("MT29F1G01ABAFD", 0x15, > + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), > + NAND_ECCREQ(8, 512), > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, > + &write_cache_variants, > + &update_cache_variants), > + 0, > + SPINAND_ECCINFO(µn_8_ooblayout, > + micron_8_ecc_get_status)), > }; > > static int micron_spinand_detect(struct spinand_device *spinand)