From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 769DBC10DCE for ; Fri, 6 Mar 2020 13:51:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 524A620848 for ; Fri, 6 Mar 2020 13:51:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726860AbgCFNvf (ORCPT ); Fri, 6 Mar 2020 08:51:35 -0500 Received: from mga17.intel.com ([192.55.52.151]:41270 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726090AbgCFNvf (ORCPT ); Fri, 6 Mar 2020 08:51:35 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Mar 2020 05:51:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,522,1574150400"; d="scan'208";a="441945932" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga006.fm.intel.com with ESMTP; 06 Mar 2020 05:51:32 -0800 Received: from andy by smile with local (Exim 4.93) (envelope-from ) id 1jADO2-007NDs-A3; Fri, 06 Mar 2020 15:51:34 +0200 Date: Fri, 6 Mar 2020 15:51:34 +0200 From: Andy Shevchenko To: Sergey.Semin@baikalelectronics.ru Cc: Jarkko Nikula , Mika Westerberg , Serge Semin , Alexey Malahov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 6/6] i2c: designware: Add Baikal-T1 SoC I2C controller support Message-ID: <20200306135134.GD1748204@smile.fi.intel.com> References: <20200306131955.12806-1-Sergey.Semin@baikalelectronics.ru> <20200306132348.71E638030793@mail.baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200306132348.71E638030793@mail.baikalelectronics.ru> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 06, 2020 at 04:19:58PM +0300, Sergey.Semin@baikalelectronics.ru wrote: > From: Serge Semin > > A third I2C controller embedded into the Baikal-T1 SoC is also fully > based on the DW APB I2C core, but its registers are indirectly > accessible via "command/data in/data out" trio. There is no difference > other than that. So in order to have that controller supported by the > common DW APB I2C driver we only need to introduce a new flag > ACCESS_INDIRECT and use the access-registers to reach the I2C controller > normal registers space in the dw_readl/dw_writel methods. Currently this > flag is only enabled for the controllers with "be,bt1-i2c" compatible > string. See my response to cover letter. > drivers/i2c/busses/i2c-designware-common.c | 79 ++++++++++++++++++--- > drivers/i2c/busses/i2c-designware-core.h | 14 ++++ > drivers/i2c/busses/i2c-designware-master.c | 1 + > drivers/i2c/busses/i2c-designware-platdrv.c | 1 + > drivers/i2c/busses/i2c-designware-slave.c | 1 + This should be split at least to two patches (preparation in the core followed by switching users). -- With Best Regards, Andy Shevchenko