[RFC PATCH V3 04/11] riscv: Add CSR defines related to VECTOR extension

guoren
2020-03-08T09:53:34Z

Follow the spec to define the regs' bits and regs' number.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
---
arch/riscv/include/asm/csr.h | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 435b65532e29..49b93b638680 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -24,6 +24,12 @@
#define SR_FS_CLEAN _AC(0x00004000, UL)
#define SR_FS_DIRTY _AC(0x00006000, UL)

+#define SR_VS _AC(0x01800000, UL) /* Vector Status */
+#define SR_VS_OFF _AC(0x00000000, UL)
+#define SR_VS_INITIAL _AC(0x00800000, UL)
+#define SR_VS_CLEAN _AC(0x01000000, UL)
+#define SR_VS_DIRTY _AC(0x01800000, UL)
+
#define SR_XS _AC(0x00018000, UL) /* Extension Status */
#define SR_XS_OFF _AC(0x00000000, UL)
#define SR_XS_INITIAL _AC(0x00008000, UL)
@@ -31,9 +37,9 @@
#define SR_XS_DIRTY _AC(0x00018000, UL)

#ifndef CONFIG_64BIT
-#define SR_SD _AC(0x80000000, UL) /* FS/XS dirty */
+#define SR_SD _AC(0x80000000, UL) /* FS/VS/XS dirty */
#else
-#define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */
+#define SR_SD _AC(0x8000000000000000, UL) /* FS/VS/XS dirty */
#endif

/* SATP flags */
@@ -102,6 +108,13 @@
#define CSR_MIP 0x344
#define CSR_MHARTID 0xf14

+#define CSR_VSTART 0x8
+#define CSR_VXSAT 0x9
+#define CSR_VXRM 0xa
+#define CSR_VL 0xc20
+#define CSR_VTYPE 0xc21
+#define CSR_VLENB 0xc22
+
#ifdef CONFIG_RISCV_M_MODE
# define CSR_STATUS CSR_MSTATUS
# define CSR_IE CSR_MIE
--
2.17.0