Re: [PATCH RFC] perf:Add driver for HiSilicon PCIe PMU

Qi Liu
2020-03-19T01:35:04Z

Thanks for reviewing this patch, will fix these in v2 patch!

On 2020/3/13 21:59, Mark Rutland wrote:
> On Fri, Mar 13, 2020 at 01:23:53PM +0000, Robin Murphy wrote:
>> On 2020-03-12 12:06 pm, Qi Liu wrote:
>>> From: Qi liu <liuqi115@huawei.com>
>
> [...]
>
>>> +#define HISI_PCIE_EVENT_SHIFT_M GENMASK(15, 0)
>>> +#define HISI_PCIE_SUBEVENT_SHIFT_M GENMASK(31, 16)
>>> +#define HISI_PCIE_SUBEVENT_SHIFT_S 16
>>> +#define HISI_PCIE_PORT_SHIFT_M GENMASK(7, 0)
>>> +#define HISI_PCIE_FUNC_SHIFT_M GENMASK(15, 8)
>>> +#define HISI_PCIE_FUNC_SHIFT_S 8
>>
>> So "SHIFT_S" means "shift" and "SHIFT_M" actually means "mask"? That's
>> unnecessarily confusing. Furthermore it might be helpful if there was a more
>> obvious distinction between hardware register fields and config fields.
>
> Also, If you use the FIELD_GET() and FIELD_PREP() helpers, you only need
> to define the mask. See <linux/bitfield.h>.
>
>>> +int hisi_pcie_pmu_event_init(struct perf_event *event)
>>> +{
>>> + struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
>>> + struct hw_perf_event *hwc = &event->hw;
>>> + u32 subevent_id, event_id, func_id, port_id;
>>> +
>>> + if (event->attr.type != event->pmu->type)
>>> + return -ENOENT;
>>> +
>>> + /*
>>> + * We do not support sampling as the counters are all shared by all
>>> + * CPU cores in a CPU die(SCCL). Also we do not support attach to a
>>
>> Do the PCIe counters have anything to do with CPU clusters at all?
>>
>>> + * task(per-process mode)
>>> + */
>>> + if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK)
>>> + return -EOPNOTSUPP;
>>> +
>>> + /*
>>> + * The uncore counters not specific to any CPU, so cannot
>>> + * support per-task
>>> + */
>>> + if (event->cpu < 0)
>>> + return -EINVAL;
>>> +
>>> + /*
>>> + * Validate if the events in group does not exceed the
>>> + * available counters in hardware.
>>> + */
>>> + if (!hisi_validate_event_group(event))
>>> + return -EINVAL;
>>> +
>>> + event_id = event->attr.config && HISI_PCIE_EVENT_SHIFT_M;
>>
>> Really? Are you sure you've tested this properly?
>
> If you had:
>
> #define HISI_PCI_EVENT_ID GENMASK(15, 0)
> #define HISI_PCI_SUBEVENT_ID GENMASK(31, 16)
>
> ... here you could do:
>
> event_id = FIELD_GET(HISI_PCI_EVENT_ID, event->attr.config);
>
>>
>>> + subevent_id = (event->attr.config && HISI_PCIE_SUBEVENT_SHIFT_M)
>>> + >> HISI_PCIE_SUBEVENT_SHIFT_S;
>
> ... and:
>
> subevent_id = FIELD_GET(HISI_PCI_SUBEVENT_ID, event->attr.config);
>
> ... and so on for other fields.
>
> Thanks,
> Mark.
>
> .
>