Re: [PATCH v2 2/4] dt-bindings: display: bridge: add it66121 bindings

Neil Armstrong
2020-03-13T15:30:08Z

On 13/03/2020 15:17, Laurent Pinchart wrote:
> Hi Neil,
>
> On Fri, Mar 13, 2020 at 03:12:13PM +0100, Neil Armstrong wrote:
>> On 13/03/2020 14:40, Laurent Pinchart wrote:
>>> On Wed, Mar 11, 2020 at 01:51:33PM +0100, Phong LE wrote:
>>>> Add the ITE bridge HDMI it66121 bindings.
>>>>
>>>> Signed-off-by: Phong LE <ple@baylibre.com>
>>>> ---
>>>> .../bindings/display/bridge/ite,it66121.yaml | 98 +++++++++++++++++++
>>>> 1 file changed, 98 insertions(+)
>>>> create mode 100644 Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml
>>>>

[...]

>>>> +
>>>> + pclk-dual-edge:
>>>> + maxItems: 1
>>>> + description: enable pclk dual edge mode.
>>>
>>> I'm having a bit of trouble understanding how this operates. Looking at
>>> the driver code the property is only taken into account to calculate the
>>> maximum allowed frequency. How is the IT66121 configured for single vs.
>>> dual pixel clock edge mode ?
>>
>> Dual edge mode is Dual-Data-Rate mode, the normal mode is MEDIA_BUS_FMT_RGB888_1X24 and dual edge is
>> MEDIA_BUS_FMT_RGB888_2X12_LE (or MEDIA_BUS_FMT_RGB888_2X12_BE, not sure) on a single clock period.
>>
>> This should be negociated at runtime, but the bus width should be specified somewhere to select
>> one of the modes.
>
> How about replacing this property by bus-width to report the connected
> bus width ? It should then become an endpoint property.

It was my thought.

The mediatek dpi also uses this property, which is also very wrong in the same way.

Neil …