Re: [PATCH V2] perf tools: Add missing Intel CPU events to parser

[Jiri Olsa <jolsa@redhat.com>]

On Thu, Mar 26, 2020 at 10:01:47AM +0200, Adrian Hunter wrote:
> perf list expects CPU events to be parseable by name, e.g.
> 
>     # perf list | grep el-capacity-read
>       el-capacity-read OR cpu/el-capacity-read/          [Kernel PMU event]
> 
> But the event parser does not recognize them that way, e.g.
> 
>     # perf test -v "Parse event"
>     <SNIP>
>     running test 54 'cycles//u'
>     running test 55 'cycles:k'
>     running test 0 'cpu/config=10,config1,config2=3,period=1000/u'
>     running test 1 'cpu/config=1,name=krava/u,cpu/config=2/u'
>     running test 2 'cpu/config=1,call-graph=fp,time,period=100000/,cpu/config=2,call-graph=no,time=0,period=2000/'
>     running test 3 'cpu/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks',period=0x1,event=0x2/ukp'
>     -> cpu/event=0,umask=0x11/
>     -> cpu/event=0,umask=0x13/
>     -> cpu/event=0x54,umask=0x1/
>     failed to parse event 'el-capacity-read:u,cpu/event=el-capacity-read/u', err 1, str 'parser error'
>     event syntax error: 'el-capacity-read:u,cpu/event=el-capacity-read/u'
>                            \___ parser error test child finished with 1
>     ---- end ----
>     Parse event definition strings: FAILED!
> 
> This happens because the parser splits names by '-' in order to deal
> with cache events. For example 'L1-dcache' is a token in
> parse-events.l which is matched to 'L1-dcache-load-miss' by the
> following rule:
> 
>     PE_NAME_CACHE_TYPE '-' PE_NAME_CACHE_OP_RESULT '-' PE_NAME_CACHE_OP_RESULT opt_event_config
> 
> And so there is special handling for 2-part PMU names i.e.
> 
>     PE_PMU_EVENT_PRE '-' PE_PMU_EVENT_SUF sep_dc
> 
> but no handling for 3-part names, which are instead added as tokens e.g.
> 
>     topdown-[a-z-]+
> 
> While it would be possible to add a rule for 3-part names, that would
> not work if the first parts were also a valid PMU name e.g.
> 'el-capacity-read' would be matched to 'el-capacity' before the parser
> reached the 3rd part.
> 
> The parser would need significant change to rationalize all this, so
> instead fix for now by adding missing Intel CPU events with 3-part names
> to the event parser as tokens.
> 
> Missing events were found by using:
> 
>     grep -r EVENT_ATTR_STR arch/x86/events/intel/core.c
> 
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>

Acked-by: Jiri Olsa <jolsa@redhat.com>

thanks,
jirka