Re: [PATCH 3/4] x86,module: Detect VMX vs SLD conflicts

Masami Hiramatsu
2020-04-07T16:51:34Z

Hi Peter,

On Tue, 07 Apr 2020 13:02:39 +0200
Peter Zijlstra <peterz@infradead.org> wrote:

> +static bool insn_is_vmx(struct insn *insn)
> +{
> + u8 modrm = insn->modrm.bytes[0];
> + u8 modrm_mod = X86_MODRM_MOD(modrm);
> + u8 modrm_reg = X86_MODRM_REG(modrm);
> +
> + u8 prefix = insn->prefixes.bytes[0];
> +
> + if (insn->opcode.bytes[0] != 0x0f)
> + return false;
> +
> + switch (insn->opcode.bytes[1]) {
> + case 0x01:
> + switch (insn->opcode.bytes[2]) {
> + case 0xc1: /* VMCALL */
> + case 0xc2: /* VMLAUNCH */
> + case 0xc3: /* VMRESUME */
> + case 0xc4: /* VMXOFF */
> + return true;
> +
> + default:
> + break;
> + }
> + break;
> +
> + case 0x78: /* VMREAD */
> + case 0x79: /* VMWRITE */
> + return true;
> +
> + case 0xc7:
> + /* VMPTRLD, VMPTRST, VMCLEAR, VMXON */
> + if (modrm_mod == 0x03)
> + break;
> +
> + if ((modrm_reg == 6 && (!prefix || prefix == 0x66 || prefix == 0xf3)) ||
> + (modrm_reg == 7 && (!prefix || prefix == 0xf3)))
> + return true;
> +
> + break;
> +
> + default:
> + break;
> + }
> +
> + return false;
> +}

OK, so here is what you need ;)

From 36f4f6aec623b0190fde95c8630a6a1d8c23ffc9 Mon Sep 17 00:00:00 2001
From: Masami Hiramatsu <mhiramat@kernel.org>
Date: Wed, 8 Apr 2020 01:04:41 +0900
Subject: [PATCH] x86: insn: Add insn_is_vmx()

Add insn_is_vmx() to identify the given instruction is
for VMX or not. This is simply identifying those instructions
by mnemonic pattern.

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
---
arch/x86/include/asm/inat.h | 1 +
arch/x86/include/asm/insn.h | 7 +++++++
arch/x86/tools/gen-insn-attr-x86.awk | 6 ++++++
tools/arch/x86/include/asm/inat.h | 1 +
tools/arch/x86/include/asm/insn.h | 7 +++++++
tools/arch/x86/tools/gen-insn-attr-x86.awk | 6 ++++++
6 files changed, 28 insertions(+)

diff --git a/arch/x86/include/asm/inat.h b/arch/x86/include/asm/inat.h
index ffce45178c08..599876801ae8 100644
--- a/arch/x86/include/asm/inat.h
+++ b/arch/x86/include/asm/inat.h
@@ -79,6 +79,7 @@
#define INAT_EVEXONLY (1 << (INAT_FLAG_OFFS + 7))
#define INAT_FPU (1 << (INAT_FLAG_OFFS + 8))
#define INAT_FPUIFVEX (1 << (INAT_FLAG_OFFS + 9))
+#define INAT_VMX (1 << (INAT_FLAG_OFFS + 10))
/* Attribute making macros for attribute tables */
#define INAT_MAKE_PREFIX(pfx) (pfx << INAT_PFX_OFFS)
#define INAT_MAKE_ESCAPE(esc) (esc << INAT_ESC_OFFS)
diff --git a/arch/x86/include/asm/insn.h b/arch/x86/include/asm/insn.h
index 1752c54d2103..57e81013836d 100644
--- a/arch/x86/include/asm/insn.h
+++ b/arch/x86/include/asm/insn.h
@@ -141,6 +141,13 @@ static inline int insn_is_fpu(struct insn *insn)
return 0;
}

+static inline int insn_is_vmx(struct insn *insn)
+{
+ if (!insn->opcode.got)
+ insn_get_opcode(insn);
+ return (insn->attr & INAT_VMX) && !insn_is_fpu(insn);
+}
+
static inline int insn_has_emulate_prefix(struct insn *insn)
{
return !!insn->emulate_prefix_size;
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk
index d74d9e605723..ade80796453c 100644
--- a/arch/x86/tools/gen-insn-attr-x86.awk
+++ b/arch/x86/tools/gen-insn-attr-x86.awk
@@ -70,6 +70,8 @@ BEGIN {
mmx_expr = "^(emms|fxsave|fxrstor|ldmxcsr|stmxcsr)" # MMX/SSE nmemonics lacking operands
fpu_expr = "^x87"

+ vmx_expr = "^VM.*" # All mnemonic start with "VM" are VMX instructions
+
lprefix1_expr = "\\((66|!F3)\\)"
lprefix2_expr = "\\(F3\\)"
lprefix3_expr = "\\((F2|!F3|66&F2)\\)"
@@ -328,6 +330,10 @@ function convert_operands(count,opnd, i,j,imm,mod,mmx)
if (match(ext, force64_expr))
flags = add_flags(flags, "INAT_FORCE64")

+ # check VMX related opcode
+ if (match(opcode, vmx_expr))
+ flags = add_flags(flags, "INAT_VMX")
+
# check REX prefix
if (match(opcode, rex_expr))
flags = add_flags(flags, "INAT_MAKE_PREFIX(INAT_PFX_REX)")
diff --git a/tools/arch/x86/include/asm/inat.h b/tools/arch/x86/include/asm/inat.h
index 2e6a05290efd..af393952916c 100644
--- a/tools/arch/x86/include/asm/inat.h
+++ b/tools/arch/x86/include/asm/inat.h
@@ -79,6 +79,7 @@
#define INAT_EVEXONLY (1 << (INAT_FLAG_OFFS + 7))
#define INAT_FPU (1 << (INAT_FLAG_OFFS + 8))
#define INAT_FPUIFVEX (1 << (INAT_FLAG_OFFS + 9))
+#define INAT_VMX (1 << (INAT_FLAG_OFFS + 10))
/* Attribute making macros for attribute tables */
#define INAT_MAKE_PREFIX(pfx) (pfx << INAT_PFX_OFFS)
#define INAT_MAKE_ESCAPE(esc) (esc << INAT_ESC_OFFS)
diff --git a/tools/arch/x86/include/asm/insn.h b/tools/arch/x86/include/asm/insn.h
index d9f6bd9059c1..d18ce4683d8e 100644
--- a/tools/arch/x86/include/asm/insn.h
+++ b/tools/arch/x86/include/asm/insn.h
@@ -141,6 +141,13 @@ static inline int insn_is_fpu(struct insn *insn)
return 0;
}

+static inline int insn_is_vmx(struct insn *insn)
+{
+ if (!insn->opcode.got)
+ insn_get_opcode(insn);
+ return (insn->attr & INAT_VMX) && !insn_is_fpu(insn);
+}
+
static inline int insn_has_emulate_prefix(struct insn *insn)
{
return !!insn->emulate_prefix_size;
diff --git a/tools/arch/x86/tools/gen-insn-attr-x86.awk b/tools/arch/x86/tools/gen-insn-attr-x86.awk
index d74d9e605723..ade80796453c 100644
--- a/tools/arch/x86/tools/gen-insn-attr-x86.awk
+++ b/tools/arch/x86/tools/gen-insn-attr-x86.awk
@@ -70,6 +70,8 @@ BEGIN {
mmx_expr = "^(emms|fxsave|fxrstor|ldmxcsr|stmxcsr)" # MMX/SSE nmemonics lacking operands
fpu_expr = "^x87"

+ vmx_expr = "^VM.*" # All mnemonic start with "VM" are VMX instructions
+
lprefix1_expr = "\\((66|!F3)\\)"
lprefix2_expr = "\\(F3\\)"
lprefix3_expr = "\\((F2|!F3|66&F2)\\)"
@@ -328,6 +330,10 @@ function convert_operands(count,opnd, i,j,imm,mod,mmx)
if (match(ext, force64_expr))
flags = add_flags(flags, "INAT_FORCE64")

+ # check VMX related opcode
+ if (match(opcode, vmx_expr))
+ flags = add_flags(flags, "INAT_VMX")
+
# check REX prefix
if (match(opcode, rex_expr))
flags = add_flags(flags, "INAT_MAKE_PREFIX(INAT_PFX_REX)")
--
2.20.1

--
Masami Hiramatsu <mhiramat@kernel.org>