From: Andrew Lunn <andrew@lunn.ch>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: netdev@vger.kernel.org,
Vivien Didelot <vivien.didelot@savoirfairelinux.com>,
open list <linux-kernel@vger.kernel.org>,
davem@davemloft.net, kuba@kernel.org
Subject: Re: [PATCH net 3/4] net: dsa: b53: Fix ARL register definitions
Date: Tue, 14 Apr 2020 16:07:30 +0200 [thread overview]
Message-ID: <20200414140730.GL436020@lunn.ch> (raw)
In-Reply-To: <20200414041630.5740-4-f.fainelli@gmail.com>
On Mon, Apr 13, 2020 at 09:16:29PM -0700, Florian Fainelli wrote:
> The ARL {MAC,VID} tuple and the forward entry were off by 0x10 bytes,
> which means that when we read/wrote from/to ARL bin index 0, we were
> actually accessing the ARLA_RWCTRL register.
>
> Fixes: 1da6df85c6fb ("net: dsa: b53: Implement ARL add/del/dump operations")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2020-04-14 14:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 4:16 [PATCH net 0/4] net: dsa: b53: Various ARL fixes Florian Fainelli
2020-04-14 4:16 ` [PATCH net 1/4] net: dsa: b53: Lookup VID in ARL searches when VLAN is enabled Florian Fainelli
2020-04-14 14:03 ` Andrew Lunn
2020-04-14 4:16 ` [PATCH net 2/4] net: dsa: b53: Fix valid setting for MDB entries Florian Fainelli
2020-04-14 14:06 ` Andrew Lunn
2020-04-14 4:16 ` [PATCH net 3/4] net: dsa: b53: Fix ARL register definitions Florian Fainelli
2020-04-14 14:07 ` Andrew Lunn [this message]
2020-04-14 4:16 ` [PATCH net 4/4] net: dsa: b53: Rework ARL bin logic Florian Fainelli
2020-04-14 14:16 ` Andrew Lunn
2020-04-14 15:47 ` [PATCH net 0/4] net: dsa: b53: Various ARL fixes Florian Fainelli
2020-04-14 23:41 ` David Miller
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