Re: [PATCHv3] w1: omap-hdq: Simplify driver with PM runtime autosuspend

H. Nikolaus Schaller
2020-04-25T10:37:19Z

> Am 25.04.2020 um 12:29 schrieb H. Nikolaus Schaller <hns@goldelico.com>:
>
> H
> The things start to get "fixed" when the hdq_isr
> jumps to 6 indicating
>
> OMAP_HDQ_INT_STATUS_RXCOMPLETE | OMAP_HDQ_INT_STATUS_TXCOMPLETE
>
> So I am getting more inclined to believe that it is
> not a power management issue but some piggybacked
> change to how interrupts are handled.
> Especially hdq_reset_irqstatus.
>
> So I will add a printk to hdq_reset_irqstatus
> to see what value it had before being reset.

I now did check the log during boot and there is the
reverse situation. Initially it works but suddenly
hdq_isr becomes 6 and then trouble starts.

So the key problem is that both, the RX and the TX
interrupts may be set and then, the code resets
everything to 0 and looses either one.

I wonder if that is an issue by two processes reading
hdq in parallel.

Another question is how independent command-writes + result-reads
are properly serialized and locked so that they don't overlap?

Maybe this is handled outside of the omap_hdq code.

So what could be a fix?

BR,
Nikolaus

[ 17.026916] omap_hdq 480b2000.1w: omap_hdq_probe
[ 17.057739] omap_hdq 480b2000.1w: omap_hdq_probe 1
[ 17.062866] omap_hdq 480b2000.1w: omap_hdq_runtime_resume
[ 17.221374] omap_hdq 480b2000.1w: OMAP HDQ Hardware Rev 0.5. Driver in Interrupt mode
[ 17.350860] omap_hdq 480b2000.1w: omap_hdq_probe 2
[ 17.372863] omap_hdq 480b2000.1w: omap_hdq_probe 3
[ 17.468444] omap_hdq 480b2000.1w: hdq_isr: 1
[ 17.473876] omap_hdq 480b2000.1w: Presence bit not set
[ 17.505249] omap_hdq 480b2000.1w: omap_hdq_probe 4
[ 17.576690] omap_hdq 480b2000.1w: omap_hdq_probe done
[ 17.697998] omap_hdq 480b2000.1w: hdq_write_byte
[ 17.704986] omap_hdq 480b2000.1w: hdq_isr: 4
[ 17.734954] omap_hdq 480b2000.1w: hdq_read_byte
[ 17.747528] omap_hdq 480b2000.1w: hdq_isr: 2
[ 17.752044] omap_hdq 480b2000.1w: hdq_write_byte
[ 17.759033] omap_hdq 480b2000.1w: hdq_isr: 4
[ 17.774414] omap_hdq 480b2000.1w: hdq_read_byte
[ 17.798767] omap_hdq 480b2000.1w: hdq_isr: 2
[ 17.803314] omap_hdq 480b2000.1w: hdq_write_byte
[ 17.821807] omap_hdq 480b2000.1w: hdq_isr: 4
[ 17.826385] omap_hdq 480b2000.1w: hdq_read_byte
[ 17.837646] omap_hdq 480b2000.1w: hdq_isr: 2
[ 17.842224] omap_hdq 480b2000.1w: hdq_write_byte
[ 17.849212] omap_hdq 480b2000.1w: hdq_isr: 4
[ 17.861877] omap_hdq 480b2000.1w: hdq_read_byte
[ 17.887573] omap_hdq 480b2000.1w: hdq_isr: 2
[ 17.892150] omap_hdq 480b2000.1w: hdq_write_byte
[ 17.899139] omap_hdq 480b2000.1w: hdq_isr: 4
[ 17.903686] omap_hdq 480b2000.1w: hdq_read_byte
[ 17.926177] omap_hdq 480b2000.1w: hdq_isr: 2
[ 17.945434] omap_hdq 480b2000.1w: hdq_write_byte
[ 17.953979] omap_hdq 480b2000.1w: hdq_isr: 4
[ 17.959503] omap_hdq 480b2000.1w: hdq_read_byte
[ 17.964294] omap_hdq 480b2000.1w: hdq_isr: 2
[ 17.984436] omap_hdq 480b2000.1w: hdq_write_byte
[ 18.017578] omap_hdq 480b2000.1w: hdq_isr: 6
[ 18.022521] omap_hdq 480b2000.1w: hdq_read_byte
[ 18.027282] omap_hdq 480b2000.1w: hdq_isr: 0
[ 18.287597] omap_hdq 480b2000.1w: timeout waiting for RXCOMPLETE, 0
[ 18.294250] omap_hdq 480b2000.1w: hdq_write_byte
[ 18.313720] omap_hdq 480b2000.1w: hdq_isr: 0
[ 18.537536] omap_hdq 480b2000.1w: TX wait elapsed
[ 18.542510] omap_hdq 480b2000.1w: TX failure:Ctrl status 0
[ 18.577697] omap_hdq 480b2000.1w: hdq_read_byte
[ 18.582489] omap_hdq 480b2000.1w: hdq_isr: 0
[ 18.787597] omap_hdq 480b2000.1w: timeout waiting for RXCOMPLETE, 0