Re: [PATCH v2 2/2] i2c: tegra: Synchronize DMA before termination

Wolfram Sang
2020-04-15T16:31:41Z

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On Tue, Mar 24, 2020 at 10:12:17PM +0300, Dmitry Osipenko wrote:
> DMA transfer could be completed, but CPU (which handles DMA interrupt)
> may get too busy and can't handle the interrupt in a timely manner,
> despite of DMA IRQ being raised. In this case the DMA state needs to
> synchronized before terminating DMA transfer in order not to miss the
> DMA transfer completion.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

Applied to for-current, thanks!

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