From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>, devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Maxime Ripard <mripard@kernel.org>
Subject: [PATCH v3 4/8] dt-bindings: phy: Convert Calxeda ComboPHY binding to json-schema
Date: Thu, 30 Apr 2020 22:10:50 +0100 [thread overview]
Message-ID: <20200430211054.30466-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20200430211054.30466-1-andre.przywara@arm.com>
Convert the Calxeda ComboPHY binding to DT schema format using
json-schema.
There is no driver in the Linux kernel matching the compatible
string, but the nodes are parsed by the SATA driver, which links to them
using its port-phys property.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/phy/calxeda-combophy.txt | 17 -------
.../bindings/phy/calxeda-combophy.yaml | 51 +++++++++++++++++++
2 files changed, 51 insertions(+), 17 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/calxeda-combophy.txt
create mode 100644 Documentation/devicetree/bindings/phy/calxeda-combophy.yaml
diff --git a/Documentation/devicetree/bindings/phy/calxeda-combophy.txt b/Documentation/devicetree/bindings/phy/calxeda-combophy.txt
deleted file mode 100644
index 6622bdb2e8bc..000000000000
--- a/Documentation/devicetree/bindings/phy/calxeda-combophy.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Calxeda Highbank Combination Phys for SATA
-
-Properties:
-- compatible : Should be "calxeda,hb-combophy"
-- #phy-cells: Should be 1.
-- reg : Address and size for Combination Phy registers.
-- phydev: device ID for programming the combophy.
-
-Example:
-
- combophy5: combo-phy@fff5d000 {
- compatible = "calxeda,hb-combophy";
- #phy-cells = <1>;
- reg = <0xfff5d000 0x1000>;
- phydev = <31>;
- };
-
diff --git a/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml b/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml
new file mode 100644
index 000000000000..16a8bd7644bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Calxeda Highbank Combination PHYs binding for SATA
+
+description: |
+ The Calxeda Combination PHYs connect the SoC to the internal fabric
+ and to SATA connectors. The PHYs support multiple protocols (SATA,
+ SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
+ controller).
+ Programming the PHYs is typically handled by those device drivers,
+ not by a dedicated PHY driver.
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+properties:
+ compatible:
+ const: calxeda,hb-combophy
+
+ '#phy-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ phydev:
+ description: device ID for programming the ComboPHY.
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maximum: 31
+
+required:
+ - compatible
+ - reg
+ - phydev
+ - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ combophy5: combo-phy@fff5d000 {
+ compatible = "calxeda,hb-combophy";
+ #phy-cells = <1>;
+ reg = <0xfff5d000 0x1000>;
+ phydev = <31>;
+ };
--
2.17.1
next prev parent reply other threads:[~2020-04-30 21:11 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 21:10 [PATCH v3 0/8] dt-bindings: calxeda: Convert bindings to json-schema Andre Przywara
2020-04-30 21:10 ` [PATCH v3 1/8] dt-bindings: clock: Convert Calxeda clock " Andre Przywara
2020-05-03 15:55 ` Rob Herring
2020-04-30 21:10 ` [PATCH v3 2/8] dt-bindings: sata: Convert Calxeda SATA controller " Andre Przywara
2020-05-03 15:55 ` Rob Herring
2020-04-30 21:10 ` [PATCH v3 3/8] dt-bindings: net: Convert Calxeda Ethernet binding " Andre Przywara
2020-05-03 15:55 ` Rob Herring
2020-04-30 21:10 ` Andre Przywara [this message]
2020-05-03 15:55 ` [PATCH v3 4/8] dt-bindings: phy: Convert Calxeda ComboPHY " Rob Herring
2020-04-30 21:10 ` [PATCH v3 5/8] dt-bindings: arm: Convert Calxeda L2 cache controller " Andre Przywara
2020-05-03 15:55 ` Rob Herring
2020-04-30 21:10 ` [PATCH v3 6/8] dt-bindings: memory-controllers: Convert Calxeda DDR " Andre Przywara
2020-05-03 15:56 ` Rob Herring
2020-04-30 21:10 ` [PATCH v3 7/8] dt-bindings: ipmi: Convert IPMI-SMIC bindings " Andre Przywara
2020-05-03 15:56 ` Rob Herring
2020-04-30 21:10 ` [PATCH v3 8/8] dt-bindings: arm: Add Calxeda system registers json-schema binding Andre Przywara
2020-05-03 15:56 ` Rob Herring
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