[PATCH RFC v2 00/11] dwmac-meson8b Ethernet RX delay configuration

Martin Blumenstingl
2020-04-29T20:17:14Z

The Ethernet TX performance has been historically bad on Meson8b and
Meson8m2 SoCs because high packet loss was seen. I found out that this
was related (yet again) to the RGMII TX delay configuration.
In the process of discussing the big picture (and not just a single
patch) [0] with Andrew I discovered that the IP block behind the
dwmac-meson8b driver actually seems to support the configuration of the
RGMII RX delay (at least on the Meson8b SoC generation).

Since I sent the last RFC I got additional documentation from Jianxin
(many thanks!). Also I have discovered some more interesting details:
- Meson8b Odroid-C1 requires an RX delay (by either the PHY or the MAC)
Based on the vendor u-boot code (not upstream) I assume that it will
be the same for all Meson8b and Meson8m2 boards
- Khadas VIM2 seems to have the RX delay built into the PCB trace
length. When I enable the RX delay on the PHY or MAC I can't get any
data through. I expect that we will have the same situation on all
GXBB, GXM, AXG, G12A, G12B and SM1 boards

Changes since RFC v1 at [1]:
- add support for the timing adjustment clock input (dt-bindings and
in the driver) thanks to the input from the unnamed Ethernet engineer
at Amlogic. This is the missing link between the fclk_div2 clock and
the Ethernet controller on Meson8b (no traffic would flow if that
clock was disabled)
- add support fot the amlogic,rx-delay-ns property. The only supported
values so far are 0ns and 2ns. The registers seem to allow more
precise timing adjustments, but I could not make that work so far.
- add more register documentation (for the new RX delay bits) and
unified the placement of existing register documentation. Again,
thanks to Jianxin and the unnamed Ethernet engineer at Amlogic
- DO NOT MERGE: .dts patches to show the conversion of the Meson8b
and Meson8m2 boards to "rgmii-id". I didn't have time for all arm64
patches yet, but these will switch to phy-mode = "rgmii-txid" with
amlogic,rx-delay-ns = <0> (because the delay seems to be provided by
the PCB trace length).

[0] https://patchwork.kernel.org/patch/11309891/
[1] https://patchwork.kernel.org/cover/11310719/

Martin Blumenstingl (11):
dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property
dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock
net: stmmac: dwmac-meson8b: use FIELD_PREP instead of open-coding it
net: stmmac: dwmac-meson8b: Move the documentation for the TX delay
net: stmmac: dwmac-meson8b: Add the PRG_ETH0_ADJ_* bits
net: stmmac: dwmac-meson8b: Fetch the "timing-adjustment" clock
net: stmmac: dwmac-meson8b: Make the clock enabling code re-usable
net: stmmac: dwmac-meson8b: add support for the RX delay configuration
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
ARM: dts: meson: Add the Ethernet "timing-adjustment" clock
ARM: dts: meson: Switch existing boards with RGMII PHY to "rgmii-id"

.../bindings/net/amlogic,meson-dwmac.yaml | 23 ++-
arch/arm/boot/dts/meson8b-odroidc1.dts | 3 +-
arch/arm/boot/dts/meson8b.dtsi | 5 +-
arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 4 +-
arch/arm/boot/dts/meson8m2.dtsi | 5 +-
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 +-
.../boot/dts/amlogic/meson-g12-common.dtsi | 6 +-
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 +-
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +-
.../ethernet/stmicro/stmmac/dwmac-meson8b.c | 140 ++++++++++++++----
10 files changed, 150 insertions(+), 52 deletions(-)

--
2.26.2