Re: [PATCH v4 00/12] DDR/L3 Scaling support on SDM845 and SC7180 SoCs

Sibi Sankar
2020-05-06T14:42:09Z

Hey Amit,
Thanks for taking time to review
the series!

On 2020-05-06 18:08, Amit Kucheria wrote:
> On Tue, May 5, 2020 at 1:54 AM Sibi Sankar <sibis@codeaurora.org>
> wrote:
>>
>> This patch series aims to extend cpu based scaling support to L3/DDR
>> on
>> SDM845 and SC7180 SoCs.
>>
>> Patches [1-3] - Blacklist SDM845 and SC7180 in cpufreq-dt-platdev
>> Patches [4-8] - Update bw levels based on cpu frequency change
>> Patches [9-10] - Add tag setting support to OPP
>> Patches [11-12] - Add the cpu opp tables for SDM845 and SC7180 SoCs.
>>
>> Depends on the following series:
>> https://lore.kernel.org/patchwork/cover/1230626/
>
> Are there any other dependencies for this series? I tried applying
> this on top of Georgi's series on v5.7-rc3. Patch 12 didn't apply
> cleanly and needed a manual fixup for the include change.
>

When I posted out it was based on
next-20200428 tree, there shouldn't
be any other dependency needed.

> Compilation failed with:
> Error:
> /home/amit/work/sources/worktree-review-pipeline/arch/arm64/boot/dts/qcom/sc7180.dtsi:101.30-31
> syntax error
> FATAL ERROR: Unable to parse input tree
>
> I've been squinting at the offending lines with no success:
> interconnects = <&gem_noc MASTER_APPSS_PROC
> &mc_virt SLAVE_EBI1>,
> <&osm_l3 MASTER_OSM_L3_APPS
> &osm_l3 SLAVE_OSM_L3>;
>

#include <dt-bindings/interconnect/qcom,sc7180.h>
You are probably missing ^^ which
is present in next.

>> Georgi,
>> Would it make sense to include tag support patches [9-10] in your
>> next
>> re-spin?
>>
>> V4:
>> * Migrate to using Georgi's new bindings
>> * Misc fixups based on Matthias comments
>> * API fixups based on Bjorn's comments on v2
>> * Picked up a few R-bs from Matthias
>>
>> v3:
>> * Migrated to using Saravana's opp-kBps bindings [1]
>> * Fixed some misc comments from Rajendra
>> * Added support for SC7180
>>
>> v2:
>> * Incorporated Viresh's comments from:
>>
>> https://lore.kernel.org/lkml/20190410102429.r6j6brm5kspmqxc3@vireshk-i7/
>>
>> https://lore.kernel.org/lkml/20190410112516.gnh77jcwawvld6et@vireshk-i7/
>> * Dropped cpufreq-map passive governor
>>
>> Sibi Sankar (12):
>> arm64: dts: qcom: sdm845: Add SoC compatible to MTP
>> cpufreq: blacklist SDM845 in cpufreq-dt-platdev
>> cpufreq: blacklist SC7180 in cpufreq-dt-platdev
>> OPP: Add and export helper to update voltage
>> OPP: Add and export helper to set bandwidth
>> cpufreq: qcom: Update the bandwidth levels on frequency change
>> OPP: Add and export helper to get icc path count
>> cpufreq: qcom: Disable fast switch when scaling ddr/l3
>> dt-bindings: interconnect: Add interconnect-tags bindings
>> OPP: Add support for setting interconnect-tags
>> arm64: dts: qcom: sdm845: Add cpu OPP tables
>> arm64: dts: qcom: sc7180: Add cpu OPP tables
>>
>> .../bindings/interconnect/interconnect.txt | 5 +
>> arch/arm64/boot/dts/qcom/sc7180.dtsi | 168 ++++++++++++
>> arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 +-
>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 258
>> ++++++++++++++++++
>> drivers/cpufreq/cpufreq-dt-platdev.c | 2 +
>> drivers/cpufreq/qcom-cpufreq-hw.c | 89 +++++-
>> drivers/opp/core.c | 114 ++++++++
>> drivers/opp/of.c | 25 +-
>> include/linux/pm_opp.h | 22 ++
>> 9 files changed, 675 insertions(+), 10 deletions(-)
>>
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>> Forum,
>> a Linux Foundation Collaborative Project

--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.