From: Sasha Levin <sashal@kernel.org>
To: Andi Kleen <ak@linux.intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>,
linux-kernel@vger.kernel.org, tglx@linutronix.de, bp@alien8.de,
luto@kernel.org, hpa@zytor.com, tony.luck@intel.com,
ravi.v.shankar@intel.com, chang.seok.bae@intel.com
Subject: Re: [PATCH v11 00/18] Enable FSGSBASE instructions
Date: Mon, 11 May 2020 00:47:09 -0400 [thread overview]
Message-ID: <20200511044709.GN13035@sasha-vm> (raw)
In-Reply-To: <20200511005319.GK3538@tassilo.jf.intel.com>
On Sun, May 10, 2020 at 05:53:19PM -0700, Andi Kleen wrote:
>> My interest in this is that we have a few workloads that value the
>> ability to access FS/GS base directly and show nice performance
>
>Can you please share some rough numbers, Sasha?
I don't have any recent numbers around these - this series effectively
enables certain workloads rather than just improve the performance
somewhat so benchmarking for exact numbers isn't too interesting here.
>I would expect everything that does a lot of context switches
>to benefit automatically, apart from the new free register (which
>requires enabling, but also has great potential)
And even more so when these registers are actually being used for the
purpose they were designed for (this is in the context of secure
computing/enclaves/etc).
--
Thanks,
Sasha
prev parent reply other threads:[~2020-05-11 4:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-09 17:36 [PATCH v11 00/18] Enable FSGSBASE instructions Sasha Levin
2020-05-09 17:36 ` [PATCH v11 01/18] x86/ptrace: Prevent ptrace from clearing the FS/GS selector Sasha Levin
2020-05-09 17:36 ` [PATCH v11 02/18] selftests/x86/fsgsbase: Test GS selector on ptracer-induced GS base write Sasha Levin
2020-05-09 17:36 ` [PATCH v11 03/18] x86/cpu: Add 'unsafe_fsgsbase' to enable CR4.FSGSBASE Sasha Levin
2020-05-09 17:36 ` [PATCH v11 04/18] x86/entry/64: Clean up paranoid exit Sasha Levin
2020-05-09 17:36 ` [PATCH v11 05/18] x86/entry/64: Switch CR3 before SWAPGS in paranoid entry Sasha Levin
2020-05-09 17:36 ` [PATCH v11 06/18] x86/entry/64: Introduce the FIND_PERCPU_BASE macro Sasha Levin
2020-05-09 17:36 ` [PATCH v11 07/18] x86/entry/64: Handle FSGSBASE enabled paranoid entry/exit Sasha Levin
2020-05-09 17:36 ` [PATCH v11 08/18] x86/entry/64: Document GSBASE handling in the paranoid path Sasha Levin
2020-05-09 17:36 ` [PATCH v11 09/18] x86/fsgsbase/64: Add intrinsics for FSGSBASE instructions Sasha Levin
2020-05-09 17:36 ` [PATCH v11 10/18] x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions Sasha Levin
2020-05-09 17:36 ` [PATCH v11 11/18] x86/fsgsbase/64: Use FSGSBASE in switch_to() if available Sasha Levin
2020-05-09 17:36 ` [PATCH v11 12/18] x86/fsgsbase/64: move save_fsgs to header file Sasha Levin
2020-05-09 23:39 ` kbuild test robot
2020-05-09 17:36 ` [PATCH v11 13/18] x86/fsgsbase/64: Use FSGSBASE instructions on thread copy and ptrace Sasha Levin
2020-05-09 17:36 ` [PATCH v11 14/18] x86/speculation/swapgs: Check FSGSBASE in enabling SWAPGS mitigation Sasha Levin
2020-05-09 17:36 ` [PATCH v11 15/18] selftests/x86/fsgsbase: Test ptracer-induced GS base write with FSGSBASE Sasha Levin
2020-05-09 17:36 ` [PATCH v11 16/18] x86/fsgsbase/64: Enable FSGSBASE on 64bit by default and add a chicken bit Sasha Levin
2020-05-09 17:36 ` [PATCH v11 17/18] x86/elf: Enumerate kernel FSGSBASE capability in AT_HWCAP2 Sasha Levin
2020-05-09 17:36 ` [PATCH v11 18/18] Documentation/x86/64: Add documentation for GS/FS addressing mode Sasha Levin
2020-05-10 1:40 ` [PATCH v11 00/18] Enable FSGSBASE instructions Dave Hansen
2020-05-10 14:16 ` Sasha Levin
2020-05-11 0:53 ` Andi Kleen
2020-05-11 4:47 ` Sasha Levin [this message]
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