[PATCH V4 2/8] dt-bindings: clock: Add schema for QCOM IPQ apss pll

Sivaprakash Murugesan
2020-05-04T06:20:34Z

Add dt-binding for apss pll found on QCOM IPQ platforms

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
.../bindings/clock/qcom,ipq-apsspll.yaml | 49 ++++++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml

diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml
new file mode 100644
index 0000000..dd12ec4
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,ipq-apsspll.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm IPQ APSS PLL Binding
+
+maintainers:
+ - Sivaprakash Murugesan <sivaprak@codeaurora.org>
+
+description:
+ The APSS PLL is the main clock that feds the CPUs on QCOM IPQ platforms.
+ It can support frequencies above 1GHz.
+
+properties:
+ compatible:
+ const: qcom,ipq-apss-pll
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 0
+
+ clocks:
+ items:
+ - description: board XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ a53pll_ipq: clock@b116000 {
+ compatible = "qcom,ipq-apss-pll";
+ reg = <0x0b116000 0x40>;
+ #clock-cells = <0>;
+ clocks = <&xo>;
+ clock-names = "xo";
+ };
--
2.7.4