From: Stephane Eranian <eranian@google.com>
To: linux-kernel@vger.kernel.org
Cc: peterz@infradead.org, mingo@elte.hu, irogers@google.com,
kim.phillips@amd.com, jolsa@redhat.com
Subject: [PATCH v2 1/5] perf/x86/rapl: move RAPL support to common x86 code
Date: Wed, 27 May 2020 15:46:55 -0700 [thread overview]
Message-ID: <20200527224659.206129-2-eranian@google.com> (raw)
In-Reply-To: <20200527224659.206129-1-eranian@google.com>
To prepare for support of both Intel and AMD RAPL.
Signed-off-by: Stephane Eranian <eranian@google.com>
---
arch/x86/events/Kconfig | 6 +++---
arch/x86/events/Makefile | 1 +
arch/x86/events/intel/Makefile | 2 --
arch/x86/events/{intel => }/rapl.c | 9 ++++++---
4 files changed, 10 insertions(+), 8 deletions(-)
rename arch/x86/events/{intel => }/rapl.c (98%)
diff --git a/arch/x86/events/Kconfig b/arch/x86/events/Kconfig
index 9a7a1446cb3a0..4a809c6cbd2f5 100644
--- a/arch/x86/events/Kconfig
+++ b/arch/x86/events/Kconfig
@@ -10,11 +10,11 @@ config PERF_EVENTS_INTEL_UNCORE
available on NehalemEX and more modern processors.
config PERF_EVENTS_INTEL_RAPL
- tristate "Intel rapl performance events"
- depends on PERF_EVENTS && CPU_SUP_INTEL && PCI
+ tristate "Intel/AMD rapl performance events"
+ depends on PERF_EVENTS && (CPU_SUP_INTEL || CPU_SUP_AMD) && PCI
default y
---help---
- Include support for Intel rapl performance events for power
+ Include support for Intel and AMD rapl performance events for power
monitoring on modern processors.
config PERF_EVENTS_INTEL_CSTATE
diff --git a/arch/x86/events/Makefile b/arch/x86/events/Makefile
index 6f1d1fde8b2de..12c42eba77ec3 100644
--- a/arch/x86/events/Makefile
+++ b/arch/x86/events/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y += core.o probe.o
+obj-$(PERF_EVENTS_INTEL_RAPL) += rapl.o
obj-y += amd/
obj-$(CONFIG_X86_LOCAL_APIC) += msr.o
obj-$(CONFIG_CPU_SUP_INTEL) += intel/
diff --git a/arch/x86/events/intel/Makefile b/arch/x86/events/intel/Makefile
index 3468b0c1dc7c9..e67a5886336c1 100644
--- a/arch/x86/events/intel/Makefile
+++ b/arch/x86/events/intel/Makefile
@@ -2,8 +2,6 @@
obj-$(CONFIG_CPU_SUP_INTEL) += core.o bts.o
obj-$(CONFIG_CPU_SUP_INTEL) += ds.o knc.o
obj-$(CONFIG_CPU_SUP_INTEL) += lbr.o p4.o p6.o pt.o
-obj-$(CONFIG_PERF_EVENTS_INTEL_RAPL) += intel-rapl-perf.o
-intel-rapl-perf-objs := rapl.o
obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel-uncore.o
intel-uncore-objs := uncore.o uncore_nhmex.o uncore_snb.o uncore_snbep.o
obj-$(CONFIG_PERF_EVENTS_INTEL_CSTATE) += intel-cstate.o
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/rapl.c
similarity index 98%
rename from arch/x86/events/intel/rapl.c
rename to arch/x86/events/rapl.c
index a5dbd25852cb7..ece043fb7b494 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -1,11 +1,14 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Support Intel RAPL energy consumption counters
+ * Support Intel/AMD RAPL energy consumption counters
* Copyright (C) 2013 Google, Inc., Stephane Eranian
*
* Intel RAPL interface is specified in the IA-32 Manual Vol3b
* section 14.7.1 (September 2013)
*
+ * AMD RAPL interface for Fam17h is described in the public PPR:
+ * https://bugzilla.kernel.org/show_bug.cgi?id=206537
+ *
* RAPL provides more controls than just reporting energy consumption
* however here we only expose the 3 energy consumption free running
* counters (pp0, pkg, dram).
@@ -58,8 +61,8 @@
#include <linux/nospec.h>
#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
-#include "../perf_event.h"
-#include "../probe.h"
+#include "perf_event.h"
+#include "probe.h"
MODULE_LICENSE("GPL");
--
2.27.0.rc0.183.gde8f92d652-goog
next prev parent reply other threads:[~2020-05-27 22:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-27 22:46 [PATCH v2 0/5] perf/x86/rapl: Enable RAPL for AMD Fam17h Stephane Eranian
2020-05-27 22:46 ` Stephane Eranian [this message]
2020-05-28 6:49 ` [tip: perf/core] perf/x86/rapl: Move RAPL support to common x86 code tip-bot2 for Stephane Eranian
2020-06-01 12:38 ` [PATCH v2 1/5] perf/x86/rapl: move " Johannes Hirte
2020-06-01 19:46 ` Stephane Eranian
2020-06-04 13:11 ` Johannes Hirte
2020-06-04 15:32 ` Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 2/5] perf/x86/rapl: refactor code for Intel/AMD sharing Stephane Eranian
2020-05-28 6:49 ` [tip: perf/core] perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUs tip-bot2 for Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 3/5] perf/x86/rapl: flip logic on default events visibility Stephane Eranian
2020-05-28 6:49 ` [tip: perf/core] perf/x86/rapl: Flip " tip-bot2 for Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 4/5] perf/x86/rapl: make perf_probe_msr() more robust and flexible Stephane Eranian
2020-05-28 6:49 ` [tip: perf/core] perf/x86/rapl: Make " tip-bot2 for Stephane Eranian
2020-05-27 22:46 ` [PATCH v2 5/5] perf/x86/rapl: add AMD Fam17h RAPL support Stephane Eranian
2020-05-28 6:49 ` [tip: perf/core] perf/x86/rapl: Add " tip-bot2 for Stephane Eranian
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200527224659.206129-2-eranian@google.com \
--to=eranian@google.com \
--cc=irogers@google.com \
--cc=jolsa@redhat.com \
--cc=kim.phillips@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox