From: Borislav Petkov <bp@alien8.de>
To: Peter Zijlstra <peterz@infradead.org>
Cc: X86 ML <x86@kernel.org>, Tom Lendacky <thomas.lendacky@amd.com>,
LKML <linux-kernel@vger.kernel.org>,
Eric Morton <Eric.Morton@amd.com>
Subject: Re: [PATCH 3/3] x86/msr: Add an MSR write callback
Date: Wed, 10 Jun 2020 15:21:31 +0200 [thread overview]
Message-ID: <20200610132131.GG14118@zn.tnic> (raw)
In-Reply-To: <20200610123226.GC2497@hirez.programming.kicks-ass.net>
On Wed, Jun 10, 2020 at 02:32:26PM +0200, Peter Zijlstra wrote:
> We cache a whole bunch of MSRs in kernel. Why is this one special?
If the others need the post-write handling, they should be added there
too. I did it with this one only as a start.
> If you write using the stupid msr device, you get to keep all pieces.
Yes, the tainting-on-write is the next thing that goes ontop of this.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2020-06-10 13:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-10 11:00 [PATCH 0/3] x86/MSR: Add a MSR write callback Borislav Petkov
2020-06-10 11:00 ` [PATCH 1/3] x86/msr: Pass a single MSR value to __rwmsr_on_cpus() too Borislav Petkov
2020-06-10 11:00 ` [PATCH 2/3] x86/msr: Add wrmsrl_val_on_cpus() Borislav Petkov
2020-06-10 11:00 ` [PATCH 3/3] x86/msr: Add an MSR write callback Borislav Petkov
2020-06-10 12:32 ` Peter Zijlstra
2020-06-10 13:21 ` Borislav Petkov [this message]
2020-06-10 14:01 ` Peter Zijlstra
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