From: Peter Zijlstra <peterz@infradead.org>
To: Borislav Petkov <bp@alien8.de>
Cc: X86 ML <x86@kernel.org>, Tom Lendacky <thomas.lendacky@amd.com>,
LKML <linux-kernel@vger.kernel.org>,
Eric Morton <Eric.Morton@amd.com>
Subject: Re: [PATCH 3/3] x86/msr: Add an MSR write callback
Date: Wed, 10 Jun 2020 16:01:29 +0200 [thread overview]
Message-ID: <20200610140129.GF2514@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20200610132131.GG14118@zn.tnic>
On Wed, Jun 10, 2020 at 03:21:31PM +0200, Borislav Petkov wrote:
> On Wed, Jun 10, 2020 at 02:32:26PM +0200, Peter Zijlstra wrote:
> > We cache a whole bunch of MSRs in kernel. Why is this one special?
>
> If the others need the post-write handling, they should be added there
> too. I did it with this one only as a start.
Still, this is really weird. The msr device is per cpu (because MSRs are
per cpu), but this shadow value is global (because we keep the same
value on all CPUs), so you then have to broadcast IPI around to fix up
the other CPUs, which, with a bit of bad luck will also get written by
userspace, causing O(n^2) IPIs.
Also, this gives some MSRs radically different behaviour from other
MSRs.
Why not create a sane sysfs interface for this LS_CFG muck in cpu/bugs.c
or so? A simple sysfs file should not me much more lines than all this.
prev parent reply other threads:[~2020-06-10 14:01 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-10 11:00 [PATCH 0/3] x86/MSR: Add a MSR write callback Borislav Petkov
2020-06-10 11:00 ` [PATCH 1/3] x86/msr: Pass a single MSR value to __rwmsr_on_cpus() too Borislav Petkov
2020-06-10 11:00 ` [PATCH 2/3] x86/msr: Add wrmsrl_val_on_cpus() Borislav Petkov
2020-06-10 11:00 ` [PATCH 3/3] x86/msr: Add an MSR write callback Borislav Petkov
2020-06-10 12:32 ` Peter Zijlstra
2020-06-10 13:21 ` Borislav Petkov
2020-06-10 14:01 ` Peter Zijlstra [this message]
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