[PATCH v6 8/8] arm: dts: rockchip: Add nfc dts for RK3036 SOC

Yifeng Zhao
2020-06-09T07:49:28Z

Add nfc(nand flash controller) node for RK3036 Soc.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

arch/arm/boot/dts/rk3036.dtsi | 52 +++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 781ac7583522..7d7c43e4c104 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -291,6 +291,21 @@
status = "disabled";
};

+ nfc: nand-controller@10500000 {
+ compatible = "rockchip,rk3036-nfc",
+ "rockchip,rk2928-nfc";
+ reg = <0x10500000 0x4000>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+ clock-names = "ahb", "nfc";
+ assigned-clocks = <&cru SCLK_NANDC>;
+ assigned-clock-rates = <150000000>;
+ pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
+ &flash_rdn &flash_rdy &flash_wrn>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cru: clock-controller@20000000 {
compatible = "rockchip,rk3036-cru";
reg = <0x20000000 0x1000>;
@@ -642,6 +657,43 @@
};
};

+ nfc {
+ flash_ale: flash-ale {
+ rockchip,pins = <2 RK_PA0 1 &pcfg_pull_default>;
+ };
+
+ flash_bus8: flash-bus8 {
+ rockchip,pins = <1 RK_PD0 1 &pcfg_pull_default>,
+ <1 RK_PD1 1 &pcfg_pull_default>,
+ <1 RK_PD2 1 &pcfg_pull_default>,
+ <1 RK_PD3 1 &pcfg_pull_default>,
+ <1 RK_PD4 1 &pcfg_pull_default>,
+ <1 RK_PD5 1 &pcfg_pull_default>,
+ <1 RK_PD6 1 &pcfg_pull_default>,
+ <1 RK_PD7 1 &pcfg_pull_default>;
+ };
+
+ flash_cle: flash-cle {
+ rockchip,pins = <2 RK_PA1 1 &pcfg_pull_default>;
+ };
+
+ flash_csn0: flash-csn0 {
+ rockchip,pins = <2 RK_PA6 1 &pcfg_pull_default>;
+ };
+
+ flash_rdn: flash-rdn {
+ rockchip,pins = <2 RK_PA3 1 &pcfg_pull_default>;
+ };
+
+ flash_rdy: flash-rdy {
+ rockchip,pins = <2 RK_PA4 1 &pcfg_pull_default>;
+ };
+
+ flash_wrn: flash-wrn {
+ rockchip,pins = <2 RK_PA2 1 &pcfg_pull_default>;
+ };
+ };
+
emac {
emac_xfer: emac-xfer {
rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */
--
2.17.1