* [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode
@ 2020-06-16 7:33 Xiaoyao Li
2020-06-16 8:20 ` Sean Christopherson
2020-06-23 9:50 ` Paolo Bonzini
0 siblings, 2 replies; 4+ messages in thread
From: Xiaoyao Li @ 2020-06-16 7:33 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson, Vitaly Kuznetsov, Jim Mattson
Cc: kvm, linux-kernel, Xiaoyao Li
Only MSR address range 0x800 through 0x8ff is architecturally reserved
and dedicated for accessing APIC registers in x2APIC mode.
Fixes: 0105d1a52640 ("KVM: x2apic interface to lapic")
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
arch/x86/kvm/x86.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 00c88c2f34e4..29d9b078ce69 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2856,7 +2856,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return kvm_mtrr_set_msr(vcpu, msr, data);
case MSR_IA32_APICBASE:
return kvm_set_apic_base(vcpu, msr_info);
- case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
+ case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
return kvm_x2apic_msr_write(vcpu, msr, data);
case MSR_IA32_TSCDEADLINE:
kvm_set_lapic_tscdeadline_msr(vcpu, data);
@@ -3196,7 +3196,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_IA32_APICBASE:
msr_info->data = kvm_get_apic_base(vcpu);
break;
- case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
+ case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
case MSR_IA32_TSCDEADLINE:
msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
--
2.18.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode
2020-06-16 7:33 [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode Xiaoyao Li
@ 2020-06-16 8:20 ` Sean Christopherson
2020-06-16 16:41 ` Jim Mattson
2020-06-23 9:50 ` Paolo Bonzini
1 sibling, 1 reply; 4+ messages in thread
From: Sean Christopherson @ 2020-06-16 8:20 UTC (permalink / raw)
To: Xiaoyao Li
Cc: Paolo Bonzini, Vitaly Kuznetsov, Jim Mattson, kvm, linux-kernel
On Tue, Jun 16, 2020 at 03:33:07PM +0800, Xiaoyao Li wrote:
> Only MSR address range 0x800 through 0x8ff is architecturally reserved
> and dedicated for accessing APIC registers in x2APIC mode.
>
> Fixes: 0105d1a52640 ("KVM: x2apic interface to lapic")
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
And perhaps more importantly, there are real MSRs that are overlapped,
e.g. MSR_IA32_TME_ACTIVATE. This probably warrants a Cc to stable; as you
found out the hard way, this breaks ignore_msrs.
Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode
2020-06-16 8:20 ` Sean Christopherson
@ 2020-06-16 16:41 ` Jim Mattson
0 siblings, 0 replies; 4+ messages in thread
From: Jim Mattson @ 2020-06-16 16:41 UTC (permalink / raw)
To: Sean Christopherson
Cc: Xiaoyao Li, Paolo Bonzini, Vitaly Kuznetsov, kvm list, LKML
On Tue, Jun 16, 2020 at 1:20 AM Sean Christopherson
<sean.j.christopherson@intel.com> wrote:
>
> On Tue, Jun 16, 2020 at 03:33:07PM +0800, Xiaoyao Li wrote:
> > Only MSR address range 0x800 through 0x8ff is architecturally reserved
> > and dedicated for accessing APIC registers in x2APIC mode.
> >
> > Fixes: 0105d1a52640 ("KVM: x2apic interface to lapic")
> > Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> > ---
>
> And perhaps more importantly, there are real MSRs that are overlapped,
> e.g. MSR_IA32_TME_ACTIVATE. This probably warrants a Cc to stable; as you
> found out the hard way, this breaks ignore_msrs.
>
> Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Excellent find!
Reviewed-by: Jim Mattson <jmattson@google.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode
2020-06-16 7:33 [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode Xiaoyao Li
2020-06-16 8:20 ` Sean Christopherson
@ 2020-06-23 9:50 ` Paolo Bonzini
1 sibling, 0 replies; 4+ messages in thread
From: Paolo Bonzini @ 2020-06-23 9:50 UTC (permalink / raw)
To: Xiaoyao Li, Sean Christopherson, Vitaly Kuznetsov, Jim Mattson
Cc: kvm, linux-kernel
On 16/06/20 09:33, Xiaoyao Li wrote:
> Only MSR address range 0x800 through 0x8ff is architecturally reserved
> and dedicated for accessing APIC registers in x2APIC mode.
>
> Fixes: 0105d1a52640 ("KVM: x2apic interface to lapic")
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
> arch/x86/kvm/x86.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 00c88c2f34e4..29d9b078ce69 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2856,7 +2856,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> return kvm_mtrr_set_msr(vcpu, msr, data);
> case MSR_IA32_APICBASE:
> return kvm_set_apic_base(vcpu, msr_info);
> - case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> + case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
> return kvm_x2apic_msr_write(vcpu, msr, data);
> case MSR_IA32_TSCDEADLINE:
> kvm_set_lapic_tscdeadline_msr(vcpu, data);
> @@ -3196,7 +3196,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> case MSR_IA32_APICBASE:
> msr_info->data = kvm_get_apic_base(vcpu);
> break;
> - case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> + case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
> return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
> case MSR_IA32_TSCDEADLINE:
> msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
>
Queued, thanks (with Cc to stable).
Paolo
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-06-23 9:50 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2020-06-16 7:33 [PATCH] KVM: X86: Fix MSR range of APIC registers in X2APIC mode Xiaoyao Li
2020-06-16 8:20 ` Sean Christopherson
2020-06-16 16:41 ` Jim Mattson
2020-06-23 9:50 ` Paolo Bonzini
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